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If you're integrating this into a C project, why not use the
processor timers to achieve your timing requirements instead of nops and
jmps? You could "bookend" the assembly routine: In C, initialize an output
compare for the fixed time length, then call or inline your assembly code
(minus the additional jmps and nops), then in C, sit in a loop waiting for
the output compare to match. The only other caveat is to make sure that
the timer output compare is not being used in the mainline code and only
used in your ISR.
I made the jump recently from IAR to GCC as well. Way too much money
to upgrade just to have a compiler for a new part. Which on that note, do
you know about the new header files that allow you to do direct assignment
to registers? (i.e. PORTA = 0x80) This is the same way that IAR and other
cross compilers set port values. It's very usefull and makes the code much
easier to read than the io macros.
Eric
-------Original Message-------
From: Grant Stockly
Date: Wednesday, July
24, 2002 06:45:28 PM
To: address@hidden
Subject: [avr-gcc-list]
Hard coded asm in an interrupt routine exactly the same length regardless of the outcome of various condition loops (+-650ns). I've used nops and jmps to acheive +-2 instruction cycle runtime for a ~500 instruction routine. Now I run into the problem of integrating this into a gcc C project. Every time there is an external interrupt I want to run this piece of code. Can I assume that during a 'C' Interrupt that the general purpose registers such as r16, r17 and r20, r21 are safe to destroy? I need to hard code this to work exactly this way. I also need to be able to initialize the stack about 30 bytes below the end of external ram. Can anyone point me to the file that has this info? I'm coming from the IAR 1.4 era, and avr-gcc is looking good. $2460 is too much for IAR's new compilier. Agree? : ) I have experience programming linux kernel device drivers and user space tcp programs on bsd. Thanks, Grant avr-gcc-list at http://avr1.org . |
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