Re: [avr-gcc-list] jtagice and stk500 protocol docs

[Karl Ran]

Hi Armand,

> Here are my results :

Just for the record: Do you know the FW-version of your Atmel box?

> On chip debug           state change (T)        DR/IR state (T)
> communication freq.
> according to Atmel
>
> 125 KHz                 8.5                     10 - 12

OK - lets do some math:
RAW worst-case bitrate would be:
1/8.5E-6 * 3 = 353 kbit/s (3 signals: TMS, TDI, TDO)

Thats more than 92 kbit/s (115.2 / 10 * 8)

So, we _have_ to either use another interface or do some data processing in 
the JTAG-sniffer chip.(to reduce the bitrate)

Or we hope that the effective JTAG data-rate is low enough to buffer some 
bits in the on-chip SRAM...


Any opinions or comments?



> Hope this helps ...

Yes it helps - thanks Armand!


Karl










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