[avr-gcc-list] avarice and I/O ports during JTAG programming/debugging

[Brian Cuthie]

Hi All,

I'm seeing some strange behavior from the I/O ports on an ATmega16 while
doing JTAG debugging and programming using avarice. Specifically, I'm
seeing a bunch of state changes on I/O lines programmed for output (from
code already in the avr chip) when avarice reads the configuration and
fuse bytes. This concerns me a bit, since it can create temporary I/O
states that may be damaging to hardware interfaced to the processor.

I have two questions:

1) Is this behavior by design? or is this some issue with avarice?

2) Would it possible for avarice to reset the processor before doing any
other JTAG operations so that the I/O ports are forced to be dormant?

-brian