Re: [avr-gcc-list] Timer Interrupt Problem on ATmega 103L

['Andrew McNabb']

On Fri, May 28, 2004 at 09:00:09PM +0200, Peter Hierholzer wrote:
> Can you post a mixed source assembler listing of the code

Here's the output of 'avr-objdump -S' (let me know if you wanted
something else):

Disassembly of section .text:

00000000 <__vectors>:
   0:   0c c0           rjmp    .+24            ; 0x1a
   2:   26 c0           rjmp    .+76            ; 0x50
   4:   25 c0           rjmp    .+74            ; 0x50
   6:   24 c0           rjmp    .+72            ; 0x50
   8:   23 c0           rjmp    .+70            ; 0x50
   a:   22 c0           rjmp    .+68            ; 0x50
   c:   21 c0           rjmp    .+66            ; 0x50
   e:   20 c0           rjmp    .+64            ; 0x50
  10:   1f c0           rjmp    .+62            ; 0x50
  12:   1e c0           rjmp    .+60            ; 0x50
  14:   1d c0           rjmp    .+58            ; 0x50
  16:   1c c0           rjmp    .+56            ; 0x50
  18:   1b c0           rjmp    .+54            ; 0x50

0000001a <__ctors_end>:
  1a:   11 24           eor     r1, r1
  1c:   1f be           out     0x3f, r1        ; 63
  1e:   cf e5           ldi     r28, 0x5F       ; 95
  20:   d2 e0           ldi     r29, 0x02       ; 2
  22:   de bf           out     0x3e, r29       ; 62
  24:   cd bf           out     0x3d, r28       ; 61

00000026 <__do_copy_data>:
  26:   10 e0           ldi     r17, 0x00       ; 0
  28:   a0 e6           ldi     r26, 0x60       ; 96
  2a:   b0 e0           ldi     r27, 0x00       ; 0
  2c:   e8 eb           ldi     r30, 0xB8       ; 184
  2e:   f0 e0           ldi     r31, 0x00       ; 0
  30:   03 c0           rjmp    .+6             ; 0x38

00000032 <.do_copy_data_loop>:
  32:   c8 95           lpm
  34:   31 96           adiw    r30, 0x01       ; 1
  36:   0d 92           st      X+, r0

00000038 <.do_copy_data_start>:
  38:   a0 36           cpi     r26, 0x60       ; 96
  3a:   b1 07           cpc     r27, r17
  3c:   d1 f7           brne    .-12            ; 0x32

0000003e <__do_clear_bss>:
  3e:   10 e0           ldi     r17, 0x00       ; 0
  40:   a0 e6           ldi     r26, 0x60       ; 96
  42:   b0 e0           ldi     r27, 0x00       ; 0
  44:   01 c0           rjmp    .+2             ; 0x48

00000046 <.do_clear_bss_loop>:
  46:   1d 92           st      X+, r1

00000048 <.do_clear_bss_start>:
  48:   a0 36           cpi     r26, 0x60       ; 96
  4a:   b1 07           cpc     r27, r17
  4c:   e1 f7           brne    .-8             ; 0x46
  4e:   18 c0           rjmp    .+48            ; 0x80

00000050 <__bad_interrupt>:
  50:   d7 cf           rjmp    .-82            ; 0x0

00000052 <__vector_16>:
  52:   1f 92           push    r1
  54:   0f 92           push    r0
  56:   0f b6           in      r0, 0x3f        ; 63
  58:   0f 92           push    r0
  5a:   11 24           eor     r1, r1
  5c:   8f 93           push    r24
  5e:   cf 93           push    r28
  60:   df 93           push    r29
  62:   cd b7           in      r28, 0x3d       ; 61
  64:   de b7           in      r29, 0x3e       ; 62
  66:   80 91 38 00     lds     r24, 0x0038
  6a:   80 95           com     r24
  6c:   80 93 38 00     sts     0x0038, r24
  70:   df 91           pop     r29
  72:   cf 91           pop     r28
  74:   8f 91           pop     r24
  76:   0f 90           pop     r0
  78:   0f be           out     0x3f, r0        ; 63
  7a:   0f 90           pop     r0
  7c:   1f 90           pop     r1
  7e:   18 95           reti

00000080 <main>:
  80:   cf e5           ldi     r28, 0x5F       ; 95
  82:   d2 e0           ldi     r29, 0x02       ; 2
  84:   de bf           out     0x3e, r29       ; 62
  86:   cd bf           out     0x3d, r28       ; 61
  88:   8f ef           ldi     r24, 0xFF       ; 255
  8a:   80 93 37 00     sts     0x0037, r24
  8e:   8f ef           ldi     r24, 0xFF       ; 255
  90:   80 93 38 00     sts     0x0038, r24
  94:   88 e0           ldi     r24, 0x08       ; 8
  96:   80 93 50 00     sts     0x0050, r24
  9a:   85 e0           ldi     r24, 0x05       ; 5
  9c:   80 93 53 00     sts     0x0053, r24
  a0:   10 92 52 00     sts     0x0052, r1
  a4:   81 e0           ldi     r24, 0x01       ; 1
  a6:   80 93 56 00     sts     0x0056, r24
  aa:   80 91 57 00     lds     r24, 0x0057
  ae:   81 60           ori     r24, 0x01       ; 1
  b0:   80 93 57 00     sts     0x0057, r24
  b4:   78 94           sei
  b6:   ff cf           rjmp    .-2             ; 0xb6


-----------------------------------------------------------
Here's the C source code:


#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/signal.h>

SIGNAL (SIG_OVERFLOW0)
{
        PORTB = ~PORTB;
}

int main()
{
        // Enable outputting to Port B;
        DDRB = 0xff;

        // Turn off all of the lights;
        PORTB = 0xff;

        // Set clock to Asynchronous Mode (use 32,768 Hz crystal)
        ASSR = _BV(AS0);

        // Scale to PCK0/128 (256 Hz)
        TCCR0 = _BV(CS02) | _BV(CS00);

        TCNT0 = 0;

        // Make sure the interrupt is cleared.
        TIFR = _BV(TOV0);

        // Enable Interrupts (set TIMSK and then global interrupts)
        TIMSK |= _BV(TOIE0);
        sei();

        while (1) {
        }

        return 1;
}