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Re: [avr-gcc-list] Question about gcc preprocessing and port/pin assignm

From: Andy Warner
Subject: Re: [avr-gcc-list] Question about gcc preprocessing and port/pin assignments
Date: Wed, 8 Dec 2004 19:57:05 -0600
User-agent: Mutt/1.2.5i

James Washer wrote:
> I'm certainly no language lawyer.. just a programmer, but
> It's quite common to have to introduce "barriers" in your code to force 
> everything ABOVE the barrier to complete, before anything below the barrier 
> is started. This is because compilers will re-order code, and processors will 
> be working on more than one instruction at a time.
> [...]

In my experience, most memory barrier-like substances are
there for hardware reasons (like NUMA, write pipelines, bus
controllers etc), rather than to defeat any compiler-induced

I do agree that hardware registers should be volatile,
which usually has the desired effect of stopping the compiler
reordering or cacheing accesses. Making them non-volatile
makes for amazingly frustrating Heisen-bugs, which
_will_ get you in the end.

Andy Warner             Voice: (612) 801-8549   Fax: (208) 575-5634

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