Re: [avr-gcc-list] "Volatile"

[David Brown]

>
> > I have had to work with software engineers who have worked in embedded
> > systems for several years and cannot tell you the effect of the static
> > modifier, let alone volatile.  A popular misconception was that these
> > keyword affect whether or not a variable is cached (pause for
> > laughter).
>
> To an otherwise fine post, I would like to raise two issues:
>
> With respect, Graham, I think you may have misunderstood the "cached"
> terminology here.  Obviously an AVR doesn't have large instruction or
> data cache like a PowerPC or Pentium.  But the compiler does cache a
> variable's value into a register and re-use that register (without
> loading the variable from memory again) as an optimization.
>

I have worked with gcc ports where "volatile" was used to indicate that a
variable should bypass cache, *in addition to* the standard properties of
volatile.  In this particular architecture (the Altera Nios), the highest
address bit was used as an indicator to the cache controller that data
should be read directly and bypass the cache, so all volatile data had that
bit set.  There is nothing in the C standard that restricts adding
additional properties like this to volatile, but it would be wrong to assume
that a cache bypass was the *only* effect of volatile.

David


> regards,
>
> !!Dean
>