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Re: [avr-gcc-list] interrupt optimization


From: David VanHorn
Subject: Re: [avr-gcc-list] interrupt optimization
Date: Wed, 1 Feb 2006 15:49:30 -0500


What's the way to go in this situation? I thought of using a naked ISR and
adding the necessary push by inline asm but what if I later change my code
and the compiler use different registers? I'm afraid to end up with broken
code.
 
 
First, can you not enable this int unless it's needed?
 
Second, it dosen't matter what the compiler is doing, an ASM coded int needs to save SREG, and any regs you modify during the int, and that's all.
 
I've even done ints that didn't bother saving the sreg, but those were special cases where I knew absolutely that I wasn't doing anything that would change the contents of SREG.
 
So:
 
Push R16  ;saving whatever the compiler thought was going on.
in R16,SREG 
push R16 ;saving sreg
 
int code, using R16
 
pop R16
out SREG,R16
pop R16
reti
 
When I code in assembler, I reserve a register to hold SREG, and two more (typically) for interrupt use, as ITEMP and ITEMP2.  This allows me to do a lot of things without pushes and pops.
 
In one app, on an 8515 at 8 mhz, I had to deal with 300,000 ints/sec from a bursty source.  No problem with this approach.
 
 

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