Re: OT: Re: [avr-gcc-list] Programming Atmel FPGAs from AVR?

[Steve Franks]

> 1. Daisy-chain the JTAG from the Mega128 to the Altera. This doesn't
> seem to work, I believe it's due to the AVR not implementing the JTAG
> spec correctly (although I'd be more than happy to be told that I've

Hate to perpetuate the off-topic blitz we're having here, but I have
to weigh in.

We placed a mega128 and a Xilnx CPLD in a chain together.  We
programmed the xilinx with their tools several hundred times.  We
could take a fresh board with a mega128, program it 4-5 times with a
jtagice, and everything would then start reading "0x00" - flash,
eeprom, fuses, everything.  The project quickly ran over schedule with
us reworking pcb's after every 5 program cycles and the project was
canceled.  As a post-mortem, we actually were invited to send boards
back to Norway for analysis, and after several months, the answer was,
"you are correct, they are wiped internally, that is never supposed to
happen, we're very sorry".  Anyone who doubts my sincerity is (1)
welcome to request a copy of my emails with atmel privately, and (2)
should know that I still use Avr devices pretty much exclusively in my
uC development, so am not attempting to discredit atmel here, just to
say that they did not successfully do this particular thing (jtag
chains).  I make no claim that this is or is not an issue on any part
other than the mega128.  I have not gotten any indication to believe
that it has been fixed in later devices, and I have not tried it
since.

FYI,
Steve