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RE: [avr-gcc-list] Multiply improvement [1]
From: |
Weddington, Eric |
Subject: |
RE: [avr-gcc-list] Multiply improvement [1] |
Date: |
Sun, 27 Apr 2008 14:11:08 -0600 |
Hmm. Then if it is that rare, then I'm thinking that it might be ok to
put it into a release at the last minute. As you said, the patch is
obvious, and these types of operations are rare. I am open to others'
suggestions.
I'm curious though: Mike got CSiBE to run for the AVR? Can Mike post
documentation on how to do this?
Eric
> -----Original Message-----
> From: Anatoly Sokolov [mailto:address@hidden
> Sent: Sunday, April 27, 2008 1:55 PM
> To: Weddington, Eric; avr-GCC
> Subject: Re: [avr-gcc-list] Multiply improvement [1]
>
> Hi.
>
> Patch is obvious and and I hope is true.
>
> Mike run gcc-testsuite with this patch:
> "There are no new FAILs or PASSes!"
>
> But:
> "Hm, a short CSiBE-run showed no change in code size. :-/"
> On my testsets also no change in code size.
>
> So signed on unsigned chars multiplication is very rare
> operation in tests.
>
> I to wait month for user responses before to add the patch in
> the GCC.
>
> Take the decision themselves.
>
> Anatoly.
>
> ----- Original Message -----
> From: "Weddington, Eric" <address@hidden>
> To: "Anatoly Sokolov" <address@hidden>; "avr-GCC"
> <address@hidden>
> Sent: Sunday, April 27, 2008 11:11 PM
> Subject: RE: [avr-gcc-list] Multiply improvement [1]
>
>
> Hi Anatoly,
>
> Thanks for the patch!
>
> Do you think that this patch is ok to put into the next
> WinAVR release?
>
> Eric
>
> > -----Original Message-----
> > From:
> > address@hidden
> > [mailto:address@hidden
> > org] On Behalf Of Anatoly Sokolov
> > Sent: Sunday, April 27, 2008 11:47 AM
> > To: avr-GCC
> > Subject: [avr-gcc-list] Multiply improvement [1]
> >
> > Hello.
> >
> > Now AVR-GCC for multiplication of two unsigned and two signed char
> > operands uses instructions 'MUL' and 'MULS' accordingly and is
> > 8x8=16bits operation. Multiplication signed on unsigned chars
> > is carried
> > out as multiplication of two 16-bit values, though in AVR
> core there
> > is instruction MULSU. This patch adds a pattern usmulqihi3 for use
> > of instruction MULSU.
> >
> > Testcase:
> > extern unsigned char _a;
> > extern char _b;
> > volatile extern int _r;
> >
> > int
> > main (void)
> > {
> > _r = (unsigned int)_a * (int)_b;
> > return 0;
> > }
> >
> > Now:
> > lds r24,_b
> >
> > clr r25 ; 6 extendqihi2/1 [length = 3]
> > sbrc r24,7
> > com r25
> >
> > lds r18,_a ; 7 *movqi/4 [length = 2]
> >
> > ldi r19,lo8(0) ; 28 *movqi/2 [length = 1]
> >
> > movw r20,r24 ; 26 *movhi/1 [length = 1]
> >
> > mul r20,r18 ; 9 *mulhi3_enh [length = 7]
> > movw r24,r0
> > mul r20,r19
> > add r25,r0
> > mul r21,r18
> > add r25,r0
> > clr r1
> >
> > sts (_r)+1,r25 ; 10 *movhi/3 [length = 4]
> > sts _r,r24
> >
> >
> > With patch:
> > lds r18,_a ; 5 *movqi/4 [length = 2]
> >
> > lds r20,_b ; 6 *movqi/4 [length = 2]
> >
> > mulsu r20,r18 ; 7 usmulqihi3 [length = 3]
> > movw r18,r0
> > clr r1
> >
> > sts (_r)+1,r19 ; 8 *movhi/3 [length = 4]
> > sts _r,r18
> >
> > Anatoly.
> >
>