RE: [avr-gcc-list] [patch] #27663: missed-optimization transforming abyte array to unsigned long

[Weddington, Eric]

> -----Original Message-----
> From: 
> address@hidden 
> [mailto:address@hidden
> org] On Behalf Of Georg-Johann Lay
> Sent: Wednesday, January 28, 2009 11:51 AM
> To: address@hidden
> Subject: [avr-gcc-list] [patch] #27663: missed-optimization 
> transforming abyte array to unsigned long
> 
> Hi, 
> 
> this patch soves the missed-optimization reported in
> 
> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=27663
> 
> to a certain degree. It works atop of the adjust_len insn attribute.
> 
> With this patch it is the same trouble as with the 1-bit 
> optimization stuff: Every single case of some algebra is 
> handled by some insn. This can tune the code in some very 
> specual situation, but there are thousands of other 
> expressions out in the world...
> 
> 
> BTW: How can I generate a patch against the mentioned 
> "adjust_len insn attribute"?. I think that would be more handy?
> 


This line should not be removed:

@@ -1,4 +1,3 @@
-;; -*- Mode: Scheme -*-
 ;;   Machine description for GNU compiler,
 ;;   for ATMEL AVR micro controllers.
 ;;   Copyright (C) 1998, 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008


Most of this patch has to do with using the "adjust_len" attribute and would be 
better off in the adjust_len patch:


@@ -116,6 +115,13 @@
                       (const_int 2))]
         (const_int 2)))
 
+;; Some complex insns don't need length adjustment and thererfore,
+;; the length of these insns must not be altered.
+;; It is easier to state this in an insn attribute
+;; than to clutter up code in avr.c:adjust_insn_length()
+(define_attr "adjust_len" "yes,no"
+  (const_string "no"))
+
 ;; Define mode iterator
 (define_mode_iterator QISI [(QI "") (HI "") (SI "")])

@@ -240,7 +246,8 @@
     || register_operand (operands[1], QImode) || const0_rtx == operands[1])"
   "* return output_movqi (insn, operands, NULL);"
   [(set_attr "length" "1,1,5,5,1,1,4")
-   (set_attr "cc" "none,none,clobber,clobber,none,none,clobber")])
+   (set_attr "cc" "none,none,clobber,clobber,none,none,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 ;; This is used in peephole2 to optimize loading immediate constants
 ;; if a scratch register from LD_REGS happens to be available.
@@ -290,7 +297,8 @@
     || (register_operand (operands[0], HImode) && 
stack_register_operand(operands[1], HImode)))"
   "* return output_movhi (insn, operands, NULL);"
   [(set_attr "length" "5,2")
-   (set_attr "cc" "none,none")])
+   (set_attr "cc" "none,none")
+   (set_attr "adjust_len" "yes,yes")])
 
 (define_insn "movhi_sp_r_irq_off"
   [(set (match_operand:HI 0 "stack_register_operand" "=q")
@@ -332,7 +340,8 @@
   "reload_completed"
   "* return output_reload_inhi (insn, operands, NULL);"
   [(set_attr "length" "4")
-   (set_attr "cc" "none")])
+   (set_attr "cc" "none")
+   (set_attr "adjust_len" "yes")])
 
 (define_insn "*movhi"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,d,*r,q,r")
@@ -341,7 +350,8 @@
     || register_operand (operands[1],HImode) || const0_rtx == operands[1])"
   "* return output_movhi (insn, operands, NULL);"
   [(set_attr "length" "2,6,7,2,6,5,2")
-   (set_attr "cc" "none,clobber,clobber,none,clobber,none,none")])
+   (set_attr "cc" "none,clobber,clobber,none,clobber,none,none")   
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 (define_peephole2 ; movw
   [(set (match_operand:QI 0 "even_register_operand" "")
@@ -409,8 +419,8 @@
   "reload_completed"
   "* return output_reload_insisf (insn, operands, NULL);"
   [(set_attr "length" "8")
-   (set_attr "cc" "none")])
-
+   (set_attr "cc" "none")
+   (set_attr "adjust_len" "yes")])
 
 (define_insn "*movsi"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r,Qm,!d,r")
@@ -419,7 +429,8 @@
     || register_operand (operands[1],SImode) || const0_rtx == operands[1])"
   "* return output_movsisf (insn, operands, NULL);"
   [(set_attr "length" "4,4,8,9,4,10")
-   (set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")])
+   (set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes")])
 
 ;; fffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
 ;; move floating point numbers (32 bit)
@@ -445,7 +456,8 @@
    || register_operand (operands[1], SFmode)"
   "* return output_movsisf (insn, operands, NULL);"
   [(set_attr "length" "4,4,8,9,4,10")
-   (set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")])
+   (set_attr "cc" "none,set_zn,clobber,clobber,none,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes")])
 
 ;;=========================================================================
 ;; move string (like memcpy)
@@ -1227,7 +1239,8 @@
           AS1 (clr,%B0));
 }"
   [(set_attr "length" "2,2,3")
-   (set_attr "cc" "set_n,clobber,set_n")])
+   (set_attr "cc" "set_n,clobber,set_n")
+   (set_attr "adjust_len" "no,yes,no")])
 
 (define_insn "andsi3"
   [(set (match_operand:SI 0 "register_operand" "=r,d")
@@ -1263,7 +1276,8 @@
   return \"bug\";
 }"
   [(set_attr "length" "4,4")
-   (set_attr "cc" "set_n,clobber")])
+   (set_attr "cc" "set_n,clobber")
+   (set_attr "adjust_len" "no,yes")])
 
 (define_peephole2 ; andi
   [(set (match_operand:QI 0 "d_register_operand" "")
@@ -1314,7 +1328,8 @@
           AS2 (ori,%B0,hi8(%2)));
 }"  
   [(set_attr "length" "2,2")
-   (set_attr "cc" "set_n,clobber")])
+   (set_attr "cc" "set_n,clobber")
+   (set_attr "adjust_len" "no,yes")])
 
 (define_insn "*iorhi3_clobber"
   [(set (match_operand:HI 0 "register_operand" "=r,r")
@@ -1358,7 +1373,8 @@
          AS2 (ori, %D0,hhi8(%2)));
 }"
   [(set_attr "length" "4,4")
-   (set_attr "cc" "set_n,clobber")])
+   (set_attr "cc" "set_n,clobber")
+   (set_attr "adjust_len" "no,yes")])
 
 (define_insn "*iorsi3_clobber"
   [(set (match_operand:SI 0 "register_operand"        "=r,r")
@@ -1618,7 +1634,8 @@
   ""
   "* return ashlqi3_out (insn, operands, NULL);"
   [(set_attr "length" "5,0,1,2,4,6,9")
-   (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+   (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 (define_insn "ashlhi3"
   [(set (match_operand:HI 0 "register_operand"           "=r,r,r,r,r,r,r")
@@ -1627,7 +1644,8 @@
   ""
   "* return ashlhi3_out (insn, operands, NULL);"
   [(set_attr "length" "6,0,2,2,4,10,10")
-   (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
+   (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 (define_insn "ashlsi3"
   [(set (match_operand:SI 0 "register_operand"           "=r,r,r,r,r,r,r")
@@ -1636,7 +1654,8 @@
   ""
   "* return ashlsi3_out (insn, operands, NULL);"
   [(set_attr "length" "8,0,4,4,8,10,12")
-   (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")])
+   (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 ;; Optimize if a scratch register from LD_REGS happens to be available.
 
@@ -1693,7 +1712,8 @@
   "reload_completed"
   "* return ashlhi3_out (insn, operands, NULL);"
   [(set_attr "length" "0,2,2,4,10")
-   (set_attr "cc" "none,set_n,clobber,set_n,clobber")])
+   (set_attr "cc" "none,set_n,clobber,set_n,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes")])
 
 (define_peephole2
   [(match_scratch:QI 3 "d")
@@ -1713,7 +1733,8 @@
   "reload_completed"
   "* return ashlsi3_out (insn, operands, NULL);"
   [(set_attr "length" "0,4,4,10")
-   (set_attr "cc" "none,set_n,clobber,clobber")])
+   (set_attr "cc" "none,set_n,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes")])
 
 ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
 ;; arithmetic shift right
@@ -1725,7 +1746,8 @@
   ""
   "* return ashrqi3_out (insn, operands, NULL);"
   [(set_attr "length" "5,0,1,2,5,9")
-   (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber")])
+   (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes")])
 
 (define_insn "ashrhi3"
   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r,r")
@@ -1734,7 +1756,8 @@
   ""
   "* return ashrhi3_out (insn, operands, NULL);"
   [(set_attr "length" "6,0,2,4,4,10,10")
-   (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")])
+   (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 (define_insn "ashrsi3"
   [(set (match_operand:SI 0 "register_operand"             "=r,r,r,r,r,r,r")
@@ -1743,7 +1766,8 @@
   ""
   "* return ashrsi3_out (insn, operands, NULL);"
   [(set_attr "length" "8,0,4,6,8,10,12")
-   (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")])
+   (set_attr "cc" "clobber,none,clobber,set_n,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 ;; Optimize if a scratch register from LD_REGS happens to be available.
 
@@ -1765,7 +1789,8 @@
   "reload_completed"
   "* return ashrhi3_out (insn, operands, NULL);"
   [(set_attr "length" "0,2,4,4,10")
-   (set_attr "cc" "none,clobber,set_n,clobber,clobber")])
+   (set_attr "cc" "none,clobber,set_n,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes")])
 
 (define_peephole2
   [(match_scratch:QI 3 "d")
@@ -1785,7 +1810,8 @@
   "reload_completed"
   "* return ashrsi3_out (insn, operands, NULL);"
   [(set_attr "length" "0,4,4,10")
-   (set_attr "cc" "none,clobber,set_n,clobber")])
+   (set_attr "cc" "none,clobber,set_n,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes")])
 
 ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >>
 ;; logical shift right
@@ -1833,7 +1859,8 @@
   ""
   "* return lshrqi3_out (insn, operands, NULL);"
   [(set_attr "length" "5,0,1,2,4,6,9")
-   (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")])
+   (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 (define_insn "lshrhi3"
   [(set (match_operand:HI 0 "register_operand"             "=r,r,r,r,r,r,r")
@@ -1842,7 +1869,8 @@
   ""
   "* return lshrhi3_out (insn, operands, NULL);"
   [(set_attr "length" "6,0,2,2,4,10,10")
-   (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
+   (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 (define_insn "lshrsi3"
   [(set (match_operand:SI 0 "register_operand"             "=r,r,r,r,r,r,r")
@@ -1851,7 +1879,8 @@
   ""
   "* return lshrsi3_out (insn, operands, NULL);"
   [(set_attr "length" "8,0,4,4,8,10,12")
-   (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")])
+   (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes,yes,yes")])
 
 ;; Optimize if a scratch register from LD_REGS happens to be available.
 
@@ -1908,7 +1937,8 @@
   "reload_completed"
   "* return lshrhi3_out (insn, operands, NULL);"
   [(set_attr "length" "0,2,2,4,10")
-   (set_attr "cc" "none,clobber,clobber,clobber,clobber")])
+   (set_attr "cc" "none,clobber,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes,yes")])
 
 (define_peephole2
   [(match_scratch:QI 3 "d")
@@ -1928,7 +1958,8 @@
   "reload_completed"
   "* return lshrsi3_out (insn, operands, NULL);"
   [(set_attr "length" "0,4,4,10")
-   (set_attr "cc" "none,clobber,clobber,clobber")])
+   (set_attr "cc" "none,clobber,clobber,clobber")
+   (set_attr "adjust_len" "yes,yes,yes,yes")])
 
 ;; abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x) abs(x)
 ;; abs
@@ -2188,7 +2219,8 @@
   ""
   "* return out_tsthi (insn,NULL);"
 [(set_attr "cc" "compare,compare")
- (set_attr "length" "1,2")])
+ (set_attr "length" "1,2")
+   (set_attr "adjust_len" "yes,yes")])
 
 (define_insn "*reversed_tsthi"
   [(set (cc0)
@@ -2206,7 +2238,8 @@
   ""
   "* return out_tstsi (insn,NULL);"
   [(set_attr "cc" "compare")
-   (set_attr "length" "4")])
+   (set_attr "length" "4")
+   (set_attr "adjust_len" "yes")])
 
 (define_insn "*reversed_tstsi"
   [(set (cc0)


-------------------------------

It would be better if the patch just contained the bug fix which is contained 
in the last hunk.

Eric Weddington