[avr-gcc-list] Bug in *rotlsi3 insns?

[Georg-Johann Lay]

Hi, im just browsing avr.md in trunk and stumbled over some new patterns 
that implement rotlsi3.

IMHO, they are buggy. But I have no testcase to make it explicit.

"*rotlsi3_8" splits for sched2 under the condition that
   ... && REGNO (operands[0]) != REGNO (operands[1])
Now suppose REGNO(op0) == 2+REGNO(op1) which is possible if op1 dies 
afterwards. E.g. op0 = (reg:SI 24). Then we will get

R24 := R25
R25 := R22
R26 := R23
R27 := R24 *bummer*

So the implementation should mind overlap_mentioned_p or care for the 
REGNO and distinguish between op0 < op1 and op0 > op1.

Last not least: Is there any advandage in writing splits for sched2? 
It's nice to write things down in RTL and to reuse other patterns, but 
in this case an ordinary insn would do just as well.

Is there some performance gain for this or other patterns when split for 
sched2 in comparison to not splitting them?

Georg-Johann