Re: [avr-gcc-list] Re: Optimisation of bit set/clear in uint32_t

[Paulo Marques]

Dale Whitfield wrote:
> Hi Graham                                        >@2009.04.22_13:55:50_+0200
> 
>> Dale Whitfield wrote:
>>
>>> Its how volatile works by *loading* the registers before making changes.
>>> However, if its possible to only store back changed bytes, then surely
>>> that's all that needs to be done.
>> Your understanding of volatile is not correct.  By saying ...
>>
> 
> This is my point exactly. What does volatile mean?

Read the standards:

http://www.open-std.org/JTC1/SC22/WG14/www/docs/n1256.pdf

>>> :-) I guess we need to agree to disagree on this.
>> ... you are declining to be corrected.  Enough said (I hope).
>>
> 
> Not at all. I accept the opinions because volatile is poorly defined to
> start with. 
> 
> What you understand is correct may not be what I understand to be
> correct. Its not a cut and dried issue.
> 
> You can search for the Linux Kernel debate on this back as far as 2006
> where Linus said somewhere:
> 
> <quote>
> The fact is, "volatile" simply doesn't inform the compiler enough about
> what the effect of an access could be under various different situations.
> 
> So the compiler really has no choice. It has to balance the fact that the
> standard requires it to do _something_ different, with the fact that
> there's really not a lot of information that the user gave, apart from the
> one bit of "it's volatile".
> 
> So the compiler really has no choice.
> 
> Btw, I think that the whole standard definition of "volatile" is pretty
> weak and useless. 
> <endquote>
> With which I whole-heartedly agree.

This quote is taken completely out of context.

Linus is complaining about SMP and "cache coherency" usage. The language
might sound harsh on the poor volatile keyword, but it is in fact aimed
at the programmers that keep introducing bugs in the kernel by expecting
the volatile to be some magic atomic / cache coherent access on its own.

So, to the linux kernel, that _must_ handle all the SMP and cache
coherency problems, volatile is mostly useless, yes. To an AVR, volatile
tells enough to be useful on its own.

-- 
Paulo Marques
Software Development Department - Grupo PIE, S.A.
Phone: +351 252 290600, Fax: +351 252 290601
Web: www.grupopie.com

"As far as we know, our computer has never had an undetected error."
Weisert