Re: [avr-gcc-list] -mmcu=avrxmega confusion

[Don Kinzer]

All xmega devices have a dedicated boot section *in addition* to the
stated amount of Flash.  In particular, this means that the xmega64xxx
devices all have slightly more than 64K of Flash and therefore have
the ELPM instruction.  For the same reason, the xmega128xxx and higher
devices all have more than 128K of Flash and therefore need the EIND
register.  Consequently, the avrxmega4 and avrxmega5 should both have
ELPM=1 and the avrxmega6 and avrxmega7 devices should have EIND=1.

Also, devices with an external bus interface (EBI) all have the
ability to address more than 64K of RAM and therefore have a RAMPD
register.  I believe that only the A1 xmega devices have the EBI and,
therefore, should have RAMPD=1.

avrxmega2: ELPM=0, EIND=0, RAMPD=0
    atxmega16a4
    atxmega16d4
    atxmega16x1
    atxmega32a4
    atxmega32d4
    atxmega32x1

avrxmega4: ELPM=1, EIND=0, RAMPD=0
    atxmega64a3
    atxmega64d3

avrxmega5: ELPM=1, EIND=0, RAMPD=1
    atxmega64a1
    atxmega64a1u

avrxmega6: ELPM=1, EIND=1, RAMPD=0
    atxmega128a3
    atxmega128b1
    atxmega128d3
    atxmega192a3
    atxmega192d3
    atxmega256a3
    atxmega256a3b
    atxmega256a3bu
    atxmega256d3

avrxmega7: ELPM=1, EIND=1, RAMPD=1
    atxmega128a1
    atxmega128a1u

Don Kinzer