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[Bug gas/10775] x86 64 documentation addenda

From: hjl dot tools at gmail dot com
Subject: [Bug gas/10775] x86 64 documentation addenda
Date: 16 Oct 2009 16:30:01 -0000

------- Additional Comments From hjl dot tools at gmail dot com  2009-10-16 
16:30 -------
(In reply to comment #0)
> The following information is lacking from the GAS manual:
> In node (as.info)i386-Mnemonics, add at the end of 9.13.4,
> In 64-bit mode, `movabs' is the form of the mov instruction which loads
> a 64-bit literal into a register.

movabs is not the only form to load a 64-bit literal into a register.
I don't think we want to go into such details here.

> The AT&T/Unixware assembler is documented at
> http://docs.sun.com/app/docs/doc/802-1948?l=en&q=assembler+manual and
> http://docs.sun.com/app/docs/doc/817-5477?l=en.
> In node (as.info)i386-Regs, before "* the 8 debug registers:" add
> * The processor control register `%cr8'.
> At the end of that node, add
> The 80386 flags register is not supported as a distinct register.  Instead, 
> the
> instructions `PUSH [ER]?FLAGS' and `POP [EA]?FLAGS' are encoded as 
> `pushf[wlq]'
> and `popf[wlq]'.

I don't think this belongs here. People should consult SDM when
writing assembly code.

> After node (as.info)i386-16bit, add a new section:
> 9.13.13 Writing 64-bit Code
> ---------------------------
> The `.code64' directive causes the assembler to emit AMD64 ``long mode''
> (64-bit) code.  As mentioned above, the `.code32' directive switches to 32-bit
> code.  Which mode the assembler is in originally depends on the --32 and --64
> options.

I will check in this patch.

diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index cf0bfa8..50e6e98 100644
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -513,6 +513,9 @@ the 4 8-bit registers: @samp{%sil}, @samp{%dil}, @samp{%bpl}
, @samp{%spl}.
 the 8 debug registers: @address@hidden
+the 8 control registers: @address@hidden
 the 8 SSE registers: @address@hidden
 @end itemize
@@ -812,8 +815,9 @@ or 64-bit x86-64 code depending on the default configuration
 it also supports writing code to run in real mode or in 16-bit protected
 mode code segments.  To do this, put a @samp{.code16} or
 @samp{.code16gcc} directive before the assembly language instructions to
-be run in 16-bit mode.  You can switch @address@hidden back to writing
-normal 32-bit code with the @samp{.code32} directive.
+be run in 16-bit mode.  You can switch @address@hidden to writing
+32-bit code with the @samp{.code32} directive or 64-bit code with the
address@hidden directive.
 @samp{.code16gcc} provides experimental support for generating 16-bit
 code from gcc, and differs from @samp{.code16} in that @samp{call},



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