bug-binutils
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Bug ld/11891] New: linker changes target register in tlsgd load


From: ubizjak at gmail dot com
Subject: [Bug ld/11891] New: linker changes target register in tlsgd load
Date: 6 Aug 2010 18:37:51 -0000

Soon to be attached asm dump is produced by compiling:

__thread a;

int
main ()
{
  a = 0;
}

with -O2 -fpic on native-TLS architecture.

To show the problem, a tlsgd load was changed from:

        lda $16,a($29)          !tlsgd!1
to:
        lda $15,a($29)          !tlsgd!1
        mov $15,$16

(this change illustrates real code, produced by compiling the testcase from
gcc.dg/tls/opt-12.c.

The object file is still OK (see insn at 0x10):

0000000000000000 <main>:
   0:   00 00 bb 27     ldah    gp,0(t12)
   4:   00 00 bd 23     lda     gp,0(gp)
   8:   f0 ff de 23     lda     sp,-16(sp)
   c:   1f 04 ff 5f     fnop    
> 10:   00 00 fd 21     lda     fp,0(gp)                     <<<<< HERE
  14:   10 04 ef 47     mov     fp,a0
  18:   00 00 7d a7     ldq     t12,0(gp)
  1c:   00 00 5e b7     stq     ra,0(sp)
  20:   00 40 5b 6b     jsr     ra,(t12),24 <main+0x24>
  24:   00 00 ba 27     ldah    gp,0(ra)
  28:   00 00 5e a7     ldq     ra,0(sp)
  2c:   00 00 e0 b3     stl     zero,0(v0)
  30:   00 00 bd 23     lda     gp,0(gp)
  34:   10 00 de 23     lda     sp,16(sp)
  38:   01 80 fa 6b     ret
  3c:   00 00 fe 2f     unop    

However, final link changes target reg in the marked insn from fp to a0:

0000000120000640 <main>:
   120000640:   02 00 bb 27     ldah    gp,2(t12)
   120000644:   d0 99 bd 23     lda     gp,-26160(gp)
   120000648:   f0 ff de 23     lda     sp,-16(sp)
   12000064c:   1f 04 ff 5f     fnop    
>  120000650:   10 00 1f 22     lda     a0,16
   120000654:   10 04 ef 47     mov     fp,a0
   120000658:   00 00 fe 2f     unop    
   12000065c:   00 00 5e b7     stq     ra,0(sp)
   120000660:   9e 00 00 00     rduniq
   120000664:   00 04 00 42     addq    a0,v0,v0
   120000668:   00 00 5e a7     ldq     ra,0(sp)
   12000066c:   00 00 e0 b3     stl     zero,0(v0)
   120000670:   00 00 fe 2f     unop    
   120000674:   10 00 de 23     lda     sp,16(sp)
   120000678:   01 80 fa 6b     ret
   12000067c:   00 00 fe 2f     unop    

There is no need for this "fixup".

-- 
           Summary: linker changes target register in tlsgd load
           Product: binutils
           Version: 2.20
            Status: NEW
          Severity: normal
          Priority: P2
         Component: ld
        AssignedTo: unassigned at sources dot redhat dot com
        ReportedBy: ubizjak at gmail dot com
                CC: bug-binutils at gnu dot org
 GCC build triplet: alphaev68-pc-linux-gnu
  GCC host triplet: alphaev68-pc-linux-gnu
GCC target triplet: alphaev68-pc-linux-gnu


http://sourceware.org/bugzilla/show_bug.cgi?id=11891

------- You are receiving this mail because: -------
You are on the CC list for the bug, or are watching someone who is.



reply via email to

[Prev in Thread] Current Thread [Next in Thread]