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Powerpc Altivec setjmp/longjmp support
From: |
J. Johnston |
Subject: |
Powerpc Altivec setjmp/longjmp support |
Date: |
Wed, 24 Apr 2002 19:27:50 -0400 |
Hello,
I am submitting the attached patch which adds Altivec ABI support to the
Powerpc setjmp/longjmp routines. The setjmp/longjmp buffer requires
additional space for storing/restoring vector registers.
2002-04-24 Jeff Johnston <address@hidden>
* sysdeps/powerpc/setjmp.S: Add Altivec ABI support.
* sysdeps/powerpc/__longjmp.S: Ditto.
* sysdeps/powerpc/bits/setjmp.h: Ditto.
-- Jeff J.
Index: sysdeps/powerpc/__longjmp.S
===================================================================
RCS file: /cvs/glibc/libc/sysdeps/powerpc/__longjmp.S,v
retrieving revision 1.11
diff -u -r1.11 __longjmp.S
--- sysdeps/powerpc/__longjmp.S 6 Jul 2001 04:56:01 -0000 1.11
+++ sysdeps/powerpc/__longjmp.S 24 Apr 2002 23:17:47 -0000
@@ -69,6 +69,36 @@
lfd fp30,((JB_FPRS+16*2)*4)(r3)
lwz r31,((JB_GPRS+17)*4)(r3)
lfd fp31,((JB_FPRS+17*2)*4)(r3)
- mr r3,r4
+#ifdef __ALTIVEC__
+ lwz r0,((JB_VRSAVE)*4)(r3)
+ mtspr 256,r0
+ addi r3,r3,(JB_VPRS*4)
+ lvx 20,0,r3
+ addi r3,r3,16
+ lvx 21,0,r3
+ addi r3,r3,16
+ lvx 22,0,r3
+ addi r3,r3,16
+ lvx 23,0,r3
+ addi r3,r3,16
+ lvx 24,0,r3
+ addi r3,r3,16
+ lvx 25,0,r3
+ addi r3,r3,16
+ lvx 26,0,r3
+ addi r3,r3,16
+ lvx 27,0,r3
+ addi r3,r3,16
+ lvx 28,0,r3
+ addi r3,r3,16
+ lvx 29,0,r3
+ addi r3,r3,16
+ lvx 30,0,r3
+ addi r3,r3,16
+ lvx 31,0,r3
+#endif
+ mr. r3,r4
+ bclr+ 4,2
+ li r3,1
blr
END (BP_SYM (__longjmp))
Index: sysdeps/powerpc/setjmp.S
===================================================================
RCS file: /cvs/glibc/libc/sysdeps/powerpc/setjmp.S,v
retrieving revision 1.11
diff -u -r1.11 setjmp.S
--- sysdeps/powerpc/setjmp.S 6 Jul 2001 04:56:01 -0000 1.11
+++ sysdeps/powerpc/setjmp.S 24 Apr 2002 23:17:47 -0000
@@ -69,5 +69,37 @@
stfd fp30,((JB_FPRS+16*2)*4)(3)
stw r31,((JB_GPRS+17)*4)(3)
stfd fp31,((JB_FPRS+17*2)*4)(3)
+#ifdef __ALTIVEC__
+ mfspr r0,256 /* vrsave */
+ mr r5,r3
+ stw r0,((JB_VRSAVE)*4)(3)
+ addi r3,r3,(JB_VPRS*4)
+ mr r0,r4
+ addi r4,r3,16
+ stvx 20,0,r3
+ stvx 21,0,r4
+ addi r3,r3,32
+ addi r4,r4,32
+ stvx 22,0,r3
+ stvx 23,0,r4
+ addi r3,r3,32
+ addi r4,r4,32
+ stvx 24,0,r3
+ stvx 25,0,r4
+ addi r3,r3,32
+ addi r4,r4,32
+ stvx 26,0,r3
+ stvx 27,0,r4
+ addi r3,r3,32
+ addi r4,r4,32
+ stvx 28,0,r3
+ stvx 29,0,r4
+ addi r3,r3,32
+ addi r4,r4,32
+ stvx 30,0,r3
+ stvx 31,0,r4
+ mr r3,r5
+ mr r4,r0
+#endif
b JUMPTARGET (BP_SYM (__sigjmp_save))
END (BP_SYM (__sigsetjmp))
Index: sysdeps/powerpc/bits/setjmp.h
===================================================================
RCS file: /cvs/glibc/libc/sysdeps/powerpc/bits/setjmp.h,v
retrieving revision 1.7
diff -u -r1.7 setjmp.h
--- sysdeps/powerpc/bits/setjmp.h 6 Jul 2001 04:56:01 -0000 1.7
+++ sysdeps/powerpc/bits/setjmp.h 24 Apr 2002 23:17:47 -0000
@@ -34,11 +34,21 @@
# define JB_GPRS 3 /* GPRs 14 through 31 are saved, 18 in total */
# define JB_CR 21 /* Condition code registers. */
# define JB_FPRS 22 /* FPRs 14 through 31 are saved, 18*2 words total */
+# ifdef __ALTIVEC__
+# define JB_VRSAVE 62 /* VRSAVE register - 1 word */
+# define JB_VPRS 64 /* VPRs 20 through 31 quad-aligned, 12*4 words total */
+# define JB_SIZE (112*4)
+# else /* !__ALTIVEC__ */
# define JB_SIZE (58*4)
+# endif /* !__ALTIVEC__ */
#endif
#ifndef _ASM
+# ifdef __ALTIVEC__
+typedef long int __jmp_buf[112];
+# else
typedef long int __jmp_buf[58];
+# endif
#endif
/* Test if longjmp to JMPBUF would unwind the frame
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