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problem with ld
From: |
Mark and Janice Juszczec |
Subject: |
problem with ld |
Date: |
Tue, 15 Jan 2002 14:23:20 +0000 |
Hello all
I have the cross compilation tools for mipsel-linux on an i686 RedHat 7.0
system:
binutils-2.11.90.0.25
gcc-3.0.1
glibc-2.2.3
I get the following when I try to compile and link the programs at the end
of this email.
/usr/local/mipsel-linux/bin/gcc -c -x assembler-with-cpp
-EL -o setup.o setup.S
setup.S: Assembler messages:
setup.S:106: Warning: No .cprestore pseudo-op used in PIC code
/usr/local/mipsel-linux/bin/gcc -EL -mno-abicalls -c hello.c
/tmp/ccIoVBF5.s: Assembler messages:
/tmp/ccIoVBF5.s:22: Warning: No .cprestore pseudo-op used in PIC code
/tmp/ccIoVBF5.s:24: Warning: No .cprestore pseudo-op used in PIC code
/usr/local/mipsel-linux/bin/ld -EL -T /usr/share/vmips/ld.script
-o hello setup.o hello.o
/usr/local/mipsel-linux/bin/ld: BFD internal error,
aborting at ../../binutils-2.11.90.0.25/bfd/elf32-mips.c
line 1350 in _bfd_mips_elf_got16_reloc
/usr/local/mipsel-linux/bin/ld: Please report this bug.
#ifndef __asm_regnames_h__
#define __asm_regnames_h__
/* Special names */
#define zero $0 /* always zero */
/*#define at $1 /* assembler temporary */
/* this conflicts with the .set at assembler directive. just use $1 instead
*/
#define v0 $2 /* function values */
#define v1 $3
#define a0 $4 /* function arguments */
#define a1 $5
#define a2 $6
#define a3 $7
#define t0 $8 /* temporary registers; not preserved across func calls */
#define t1 $9
#define t2 $10
#define t3 $11
#define t4 $12
#define t5 $13
#define t6 $14
#define t7 $15
#define s0 $16 /* "saved" regs - must preserve these if you use them */
#define s1 $17
#define s2 $18
#define s3 $19
#define s4 $20
#define s5 $21
#define s6 $22
#define s7 $23
#define t8 $24 /* more temporary regs */
#define t9 $25
#define k0 $26 /* kernel temporary variables */
#define kt0 $26
#define k1 $27
#define kt1 $27
#define gp $28 /* pointer to globals */
#define sp $29 /* stack pointer */
#define s8 $30 /* another "saved" reg */
#define ra $31 /* return address */
/* CP0 reg names - these pertain to address translation and
* exception handling, and not all of them are implemented on the
* R3000. (But they have such cool names...)
*/
#define Index $0 /* selects TLB entry for r/w ops & shows probe success
*/
#define Random $1 /* continuously decrementing number (range 8..63) */
#define EntryLo $2 /* low word of a TLB entry */
#define EntryLo0 $2 /* R4k uses this for even-numbered virtual pages */
#define EntryLo1 $3 /* R4k uses this for odd-numbered virtual pages */
#define Context $4 /* TLB refill handler's kernel PTE entry pointer */
#define PageMask $5 /* R4k page number bit mask (impl. variable page sizes)
*/
#define Wired $6 /* R4k lower bnd for Random (controls randomness of
TLB) */
#define Error $7 /* R6k status/control register for parity checking */
#define BadVAddr $8 /* "bad" virt. addr (VA of last failed v->p
translation) */
#define Count $9 /* R4k r/w reg - continuously incrementing counter */
#define EntryHi $10 /* High word of a TLB entry */
#define ASID $10 /* R6k uses this to store the ASID (only) */
#define Compare $11 /* R4k traps when this register equals Count */
#define Status $12 /* Kernel/User mode, interrupt enb., & diagnostic
states */
#define Cause $13 /* Cause of last exception */
#define EPC $14 /* Address to return to after processing this exception
*/
#define PRId $15 /* Processor revision identifier */
#define Config $16 /* R4k config options for caches, etc. */
#define LLAdr $17 /* R4k last instruction read by a Load Linked */
#define LLAddr $17 /* Inconsistencies in naming... sigh. */
#define WatchLo $18 /* R4k hardware watchpoint data */
#define WatchHi $19 /* R4k hardware watchpoint data */
/* 20-25 - reserved */
#define ECC $26 /* R4k cache Error Correction Code */
#define CacheErr $27 /* R4k read-only cache error codes */
#define TagLo $28 /* R4k primary or secondary cache tag and parity */
#define TagHi $29 /* R4k primary or secondary cache tag and parity */
#define ErrorEPC $30 /* R4k cache error EPC */
/* 31 - reserved */
/* Exceptions - Cause register ExcCode field */
#define Int 0 /* Interrupt */
#define Mod 1 /* TLB modification exception */
#define TLBL 2 /* TLB exception (load or instruction fetch) */
#define TLBS 3 /* TLB exception (store) */
#define AdEL 4 /* Address error exception (load or instruction fetch)
*/
#define AdES 5 /* Address error exception (store) */
#define IBE 6 /* Instruction bus error */
#define DBE 7 /* Data (load or store) bus error */
#define Sys 8 /* SYSCALL exception */
#define Bp 9 /* Breakpoint exception (BREAK instruction) */
#define RI 10 /* Reserved instruction exception */
#define CpU 11 /* Coprocessor Unusable */
#define Ov 12 /* Arithmetic Overflow */
#define Tr 13 /* Trap (R4k/R6k only) */
#define NCD 14 /* LDCz or SDCz to uncached address (R6k) */
#define VCEI 14 /* Virtual Coherency Exception (instruction) (R4k) */
#define MV 15 /* Machine check exception (R6k) */
#define FPE 15 /* Floating-point exception (R4k) */
/* 16-22 - reserved */
#define WATCH 23 /* Reference to WatchHi/WatchLo address detected (R4k)
*/
/* 24-30 - reserved */
#define VCED 31 /* Virtual Coherency Exception (data) (R4k) */
#endif /* __asm_regnames_h__ */
/* setup.S
*
* A simple kernel to run one function void FUNCTION(void) in uncached,
* unmapped kernel space. This program should be the first one linked in.
*/
#include "asm_regnames.h"
/* These values should match the values given in ld.script. */
#define MEM_BASE 0xa0000000
#define MEM_SIZE 0x100000
#define DATA_START MEM_BASE + (MEM_SIZE*3/4)
#define INIT_STACK_BASE DATA_START - 4
#define NTLBENTRIES 64
#define FUNCTION entry
.text
.globl __start
.ent __start
__start:
j begin
.end __start
/* Halt on user tlb exceptions. */
.org 0x100
break 0x0
/* Halt on exceptions. */
.org 0x180
break 0x0
.org 0x200
.globl begin
.ent begin
begin:
/* Start by clearing everything out. */
.set noat
move $1, $0
.set at
move $2, $0
move $3, $0
move $4, $0
move $5, $0
move $6, $0
move $7, $0
move $8, $0
move $9, $0
move $10, $0
move $11, $0
move $12, $0
move $13, $0
move $14, $0
move $15, $0
move $16, $0
move $17, $0
move $18, $0
move $19, $0
move $20, $0
move $21, $0
move $22, $0
move $23, $0
move $24, $0
move $25, $0
move $26, $0
move $27, $0
move $28, $0
move $29, $0
move $30, $0
mtc0 zero, $4
mtc0 zero, $8
mtc0 zero, $14
/* Clear out the TLB. */
li t2, NTLBENTRIES /* t2 = TLB entry number */
li t3, 0x00000fc0 /* t3 = (VPN 0x0, ASID 0x3f) */
1:
addiu t2, t2, -1 /* Decrement TLB entry number */
sll t1, t2, 8 /* Shift entry number into Index field position
*/
mtc0 t1, $0 /* set Index */
mtc0 zero, $2 /* clear EntryLo */
mtc0 t3, $10 /* set EntryHi */
tlbwi /* write TLB[Index] with (EntryHi,
EntryLo) */
bnez t2, 1b /* Go back if we're not done yet. */
nop
mtc0 zero, $10 /* clear EntryHi (sets effective ASID=0x0) */
/* Set up the stack and globals pointer. */
li sp, INIT_STACK_BASE
la gp, _gp
/* Copy writeable data to writeable RAM. */
la t1, _copystart /* t1 = beginning source address for
copy */
la t2, _copyend
addiu t2, t2, 4 /* t2 = one word past ending source address */
move t3, gp /* t3 = beginning dest address */
1:
lw t4, 0(t1) /* load t4 from ROM */
sw t4, 0(t3) /* store it in RAM */
addiu t1, t1, 4 /* increment both pointers */
addiu t3, t3, 4
bne t1, t2, 1b /* if we're not finished, loop. */
nop
/* Call the function. */
jal FUNCTION
/* Wait a minute, wait a minute, stop the execution! */
break 0x0
.end begin
hello.c
#include <stdio.h>
main(int argc, char **argv){
printf ("hello world\n");
exit(0);
}
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