Re: cache coherency in DMA and MMIO

[Samuel Thibault]

Da Zheng, le Sat 24 Apr 2010 19:39:58 +0800, a écrit :
> If a variable doesn't have the volatile qualifier and If it is in a register 
> at
> the moment it is modified by DMA, the value in the register is out-of-date.

Yes, that's why the DMA order must use compiler memory barriers to
prevent that: asm("":::"memory"). But that's all it needs to do,
provided the DMA chip handles cache coherency.

Samuel