target variable assignments

[EXT-McVicker, Eric A]

This could be either a bug with the documentation, or with make.  I have
attempted to use make 3.77 and make 3.79.1 and this example fails under both
programs.

I have a complex makefile that I have been able to simplify into a small
number of lines to demonstrate my problem.  The makefile would go as
follows:



%_crbd_fl : TARGET = FLASH
603_ac_% : COMPUTER = AC
 
all: 603_ac_crbd_fl
 
603_ac_crbd_fl:
        @echo "$(TARGET)"
        @echo "$(COMPUTER)"


What I would expect to see is both FLASH and AC echoed out to my screen.
However with the makefile written in this manner I only see FLASH.  Upon
further analysis if the makefile were modified into:

603_ac_% : COMPUTER = AC
%_crbd_fl : TARGET = FLASH
 
all: 603_ac_crbd_fl
 
603_ac_crbd_fl:
        @echo "$(TARGET)"
        @echo "$(COMPUTER)"


I would only then see a blank line followed by AC being echoed.  The make
manual never specifies that you cannot intermingle your target matching, so
I believe this to be a valid construct.  If I am mistaken, forgive me for
wasting your time.

As a further note:  It once it has chosen a target matching algorithm for
the target specific variable assignments, it is consistent throughout the
entire makefile.  IE: all target variable definitions will only match
depending on the syntax of the first rule.

Thanks,


Eric A. McVicker
Iridium Satellite, LLC.          ENVISION
1800 S. Price Rd.                8655 E. Via De Ventura; Ste. G-224
Chandler, AZ  85248              Scottsdale, AZ  85258

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