Re: make doesn't complain if target cannot be built

[Christian Eggers]

Am Dienstag, 14. Januar 2014, 08:12:38 schrieb Paul Smith:
> Can you add the prerequisite to the pattern rules?
> 
>   %.o : %.c generated.h
>           $(COMPILE.c) ...
>   %.o : %.cpp generated.h
>           $(COMPILE.cpp) ...
> 
> This has the definite potential downside that if "generated.h" changes
> then _every_ object file will rebuild, even if they do not use it.  But
> maybe they all use it anyway.

generated.h will only be used by some object files, so this seems to be no 
good way

> Alternatively you could use order-only prerequisites:
> 
>   %.o : %.c | generated.h
>           $(COMPILE.c) ...
>   %.o : %.cpp | generated.h
>           $(COMPILE.cpp) ...
> 
> Now you have the opposite problem: generated.h will be rebuilt BUT none
> the object files will be recompiled (if the only thing that's changed is
> the generated.h file).

I think this issue can be avoided by using automatically generated dependency 
files.

> Really, I'm not sure I see the ultimate problem.  First, it seems that
> you will always need to define header files, etc., so you will already
> have plenty of rules of the form:
> 
>     foo.o: bar.h biz.h
> 
> and so this issue already exists.

As I'm using generated dependency files which at least don't exist when make 
is run for the 1st time. So missing sources will be detected. For further 
runs, there will be an explicit dependency for each object file which 
recognizes, whether the source file is missing.

> Second, if all you're worried about is someone adding a bogus file to
> the makefile list of objects, that doesn't seem like a real issue; sure,
> it won't be caught here but the build will still fail (presumably you're
> using that list of objects to construct something else and THAT will not
> work if one of the object files is missing).

Yes, this is catched by the linker. But I think this is not optimal (and not 
what I expect).

> If you really want to catch it early you can just do a specific check to
> make sure all the listed files exist:
> 
>     SOURCES := foo.c foo.cpp foo.asm ...
> 
>     MISSING := $(filter-out $(wildcard $(SOURCES)),$(SOURCES))
>     ifneq (,$(MISSING))
>       $(error Missing files: $(MISSING))
>     endif
> 
> It's definitely true that you won't be able to get the traditional make
> error message; I just don't think it's worth the hoops you'll need to
> jump through to make that happen.
> 
> But maybe you have some other requirement.

I've tested your second hint (order-only prerequisites in implicit pattern 
rules) in combination with automatically generated dependency files:

---Makefile---
.PHONY: all clean

OBJS := foo.o bar.o

all: $(OBJS)

$(OBJS): CPPFLAGS += -MMD -MF $(@:%=%.d) -MP -MT $(@:%=%.d) -MT $(@)

%.o: %.c | generated.h
        $(COMPILE.c) $(OUTPUT_OPTION) $<

generated.h: generated.x
        touch $(@)

clean:
        $(RM) $(OBJS) $(OBJS:%=%.d) generated.h

-include $(OBJS:%=%.d)
---EOF---

This avoids $(OBJS) to become a target (unless the dependency files are 
generated). This seems to work correctly for all cases I tested 

If interested, see attached tar archive and run "run_tests.sh".

thanks
Christian

make_missing_implicit.tar.gz
Description: application/compressed-tar