[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Commit-gnuradio] gr-usrp/src db_flexrf_mimo.py
From: |
Matt Ettus |
Subject: |
[Commit-gnuradio] gr-usrp/src db_flexrf_mimo.py |
Date: |
Sat, 17 Jun 2006 18:22:35 +0000 |
CVSROOT: /sources/gnuradio
Module name: gr-usrp
Changes by: Matt Ettus <mettus> 06/06/17 18:22:35
Modified files:
src : db_flexrf_mimo.py
Log message:
400 MHz boards now use full 64 MHz clock
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/gr-usrp/src/db_flexrf_mimo.py?cvsroot=gnuradio&r1=1.3&r2=1.4
Patches:
Index: db_flexrf_mimo.py
===================================================================
RCS file: /sources/gnuradio/gr-usrp/src/db_flexrf_mimo.py,v
retrieving revision 1.3
retrieving revision 1.4
diff -u -b -r1.3 -r1.4
--- db_flexrf_mimo.py 13 Mar 2006 22:24:42 -0000 1.3
+++ db_flexrf_mimo.py 17 Jun 2006 18:22:35 -0000 1.4
@@ -123,24 +123,24 @@
class db_flexrf_400_tx_mimo_b(db_flexrf_400_tx):
def __init__(self, usrp, which):
db_flexrf_400_tx.__init__(self, usrp, which)
- self.R_DIV = 1
+ self.R_DIV = 16
def _refclk_divisor(self):
"""
Return value to stick in REFCLK_DIVISOR register
"""
- return 16
+ return 1
class db_flexrf_400_rx_mimo_b(db_flexrf_400_rx):
def __init__(self, usrp, which):
db_flexrf_400_rx.__init__(self, usrp, which)
- self.R_DIV = 1
+ self.R_DIV = 16
def _refclk_divisor(self):
"""
Return value to stick in REFCLK_DIVISOR register
"""
- return 16
+ return 1
# hook these daughterboard classes into the auto-instantiation framework
db_instantiator.add(usrp_dbid.FLEX_2400_TX_MIMO_A, lambda usrp, which :
(db_flexrf_2400_tx_mimo_a(usrp, which),))
- [Commit-gnuradio] gr-usrp/src db_flexrf_mimo.py,
Matt Ettus <=