[Commit-gnuradio] r4899 - gnuradio/branches/developers/matt/u2f/top/safe_bringup

[matt]

Author: matt
Date: 2007-04-06 13:56:02 -0600 (Fri, 06 Apr 2007)
New Revision: 4899

Added:
   gnuradio/branches/developers/matt/u2f/top/safe_bringup/safe_bringup.v
Removed:
   gnuradio/branches/developers/matt/u2f/top/safe_bringup/u2_basic.v
Log:
rename


Copied: gnuradio/branches/developers/matt/u2f/top/safe_bringup/safe_bringup.v 
(from rev 4896, 
gnuradio/branches/developers/matt/u2f/top/safe_bringup/u2_basic.v)
===================================================================
--- gnuradio/branches/developers/matt/u2f/top/safe_bringup/safe_bringup.v       
                        (rev 0)
+++ gnuradio/branches/developers/matt/u2f/top/safe_bringup/safe_bringup.v       
2007-04-06 19:56:02 UTC (rev 4899)
@@ -0,0 +1,182 @@
+`timescale 1ns / 1ps
+//////////////////////////////////////////////////////////////////////////////////
+// Company: 
+// Engineer: 
+// 
+// Create Date:    16:40:10 03/28/2007 
+// Design Name: 
+// Module Name:    u2_basic 
+// Project Name: 
+// Target Devices: 
+// Tool versions: 
+// Description: 
+//
+// Dependencies: 
+//
+// Revision: 
+// Revision 0.01 - File Created
+// Additional Comments: 
+//
+//////////////////////////////////////////////////////////////////////////////////
+module u2_basic
+  (
+
+   // Misc, debug
+   output led1,
+   output led2,
+   output [31:0] debug,
+   output [1:0] debug_clk,
+
+   // Expansion
+   input exp_pps_in, // Diff
+   output exp_pps_out, // Diff 
+   
+   // GMII
+   //   GMII-CTRL
+   input GMII_COL,
+   input GMII_CRS,
+
+   //   GMII-TX
+   output [7:0] GMII_TXD,
+   output GMII_TX_EN,
+   output GMII_TX_ER,
+   output GMII_GTX_CLK,
+   output GMII_TX_CLK,  // 100mbps clk
+
+   //   GMII-RX
+   input [7:0] GMII_RXD,
+   input GMII_RX_CLK,
+   input GMII_RX_DV,
+   input GMII_RX_ER,
+
+   //   GMII-Management
+   inout MDIO,
+   output MDC,
+   input PHY_INTn,   // open drain
+   output PHY_RESETn,
+   output PHY_CLK,   // possibly use on-board osc
+
+   // RAM
+   inout [17:0] RAM_D,
+   output [18:0] RAM_A,
+   output RAM_CE1n,
+   output RAM_CENn,
+   output RAM_CLK,
+   output RAM_WEn,
+   output RAM_OEn,
+   output RAM_LDn,
+   
+   // SERDES
+   output ser_enable,
+   output ser_prbsen,
+   output ser_loopen,
+   
+   output ser_tx_clk,
+   output [15:0] ser_t,
+   output ser_tklsb,
+   output ser_tkmsb,
+
+   input ser_rx_clk,
+   output ser_rx_en,
+   input [15:0] ser_r,
+   input ser_rklsb,
+   input ser_rkmsb,
+   
+   // CPLD interface
+   output spi_cpld_en,
+   output spi_cpld_dout,
+   input spi_cpld_din,
+   input spi_cpld_clk,   // temporary bootstrap clock
+   
+   // ADC
+   input [13:0] adc_a,
+   input adc_ovf_a,
+   output adc_oen_a,
+   output adc_pdn_a,
+   
+   input [13:0] adc_b,
+   input adc_ovf_b,
+   output adc_oen_b,
+   output adc_pdn_b,
+   
+   // DAC
+   output [15:0] dac_a,
+   output [15:0] dac_b,
+
+   
+   // I2C
+   inout SCL,
+   inout SDA,
+   output SCL_force,
+   output SDA_force,
+
+   // Clock Gen Control
+   output [1:0] clk_en,
+   output [1:0] clk_sel,
+   input clk_func,        // FIXME is an output to control the 9510
+   input clk_status,
+
+   // Clocks
+   input clk_fpga,  // Diff
+   input clk_to_mac,
+   input pps_in,
+   
+   // Generic SPI
+   output sclk,
+   output sen_clk,
+   output sen_dac,
+   output sdi,
+   input sdo,
+   
+   // TX DBoard
+   output sen_tx_db,
+   output sclk_tx_db,
+   output sdo_tx_db,
+   input sdi_tx_db,
+
+   output sen_tx_adc,
+   output sclk_tx_adc,
+   output sdo_tx_adc,
+   input sdi_tx_adc,
+
+   output sen_tx_dac,
+   output sclk_tx_dac,
+   output sdi_tx_dac,
+
+   inout [15:0] io_tx,
+
+   // RX DBoard
+   output sen_rx_db,
+   output sclk_rx_db,
+   output sdo_rx_db,
+   input sdi_rx_db,
+
+   output sen_rx_adc,
+   output sclk_rx_adc,
+   output sdo_rx_adc,
+   input sdi_rx_adc,
+
+   output sen_rx_dac,
+   output sclk_rx_dac,
+   output sdi_rx_dac,
+
+   inout [15:0] io_rx
+   );
+
+   wire        aux_clk = spi_cpld_clk;
+   
+   clock_control clock_control 
+     (.reset(),
+      .aux_clk(aux_clk),    // 25MHz, for before fpga clock is active
+      .clk_fpga(clk_fpga),  // real 100 MHz FPGA clock
+      .clk_en(clk_en),      // controls source of reference clock
+      .clk_sel(clk_sel),    // controls source of reference clock
+      .clk_func(clk_func),  // SYNC or reset to 9510
+      .clk_status(clk_status),  // Monitor PLL or SYNC status
+      
+      .sen(sen_clk),        // Enable for the AD9510
+      .sclk(sclk),.sdi(sdi),.sdo(sdo)  // FIXME these need to be shared
+      );
+   
+endmodule // u2_basic
+

Deleted: gnuradio/branches/developers/matt/u2f/top/safe_bringup/u2_basic.v