commit-gnuradio
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Commit-gnuradio] r5473 - gnuradio/branches/developers/matt/u2f/firmware


From: matt
Subject: [Commit-gnuradio] r5473 - gnuradio/branches/developers/matt/u2f/firmware
Date: Mon, 14 May 2007 22:45:35 -0600 (MDT)

Author: matt
Date: 2007-05-14 22:45:35 -0600 (Mon, 14 May 2007)
New Revision: 5473

Modified:
   gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c
   gnuradio/branches/developers/matt/u2f/firmware/memory_map.h
Log:
memory size changed


Modified: gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c  2007-05-15 
02:51:01 UTC (rev 5472)
+++ gnuradio/branches/developers/matt/u2f/firmware/bootstrap.c  2007-05-15 
04:45:35 UTC (rev 5473)
@@ -2,7 +2,7 @@
 #include "memory_map.h"
 
 int main() {
-  
+
   // Set up AD9510
   spi_init();
 
@@ -30,7 +30,6 @@
   *gpio_io_rx = (short) 0xDEAD;
   *gpio_io_tx = (short) 0xBEEF;
 
-
   // Enable ADCs
   p = (char *)(OUTPUTS_BASE + OUTPUTS_ADC);
   *p = 0;  // Power up and enable outputs
@@ -47,11 +46,11 @@
   //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000301, 16, 0);  // PLL = 
   //spi_transact(SPI_TXONLY, SPI_SS_AD9777, 0x00000480, 16, 0);  // PLL on, 
automatic
 
-  short *dsp_i = (short *)(DSP_BASE+DSP_IAMP);
-  short *dsp_q = (short *)(DSP_BASE+DSP_QAMP);
-  int *dsp_freq = (int *)(DSP_BASE+DSP_FREQ);
-  short *dsp_scale_i = (short *)(DSP_BASE+DSP_ISCALE);
-  short *dsp_scale_q = (short *)(DSP_BASE+DSP_QSCALE);
+  volatile short *dsp_i = (short *)(DSP_BASE+DSP_IAMP);
+  volatile short *dsp_q = (short *)(DSP_BASE+DSP_QAMP);
+  volatile int *dsp_freq = (int *)(DSP_BASE+DSP_FREQ);
+  volatile short *dsp_scale_i = (short *)(DSP_BASE+DSP_ISCALE);
+  volatile short *dsp_scale_q = (short *)(DSP_BASE+DSP_QSCALE);
 
   *dsp_i = (short) 0x7FFF;
   *dsp_q = (short) 0x7FFF;
@@ -59,6 +58,13 @@
   *dsp_scale_i = (short) 512;
   *dsp_scale_q = (short) 123;
 
+  // Set up serdes
+  //char serdes_controls = (char)(SERDES_ENABLE | SERDES_LOOPEN | SERDES_RXEN);
+  char serdes_controls = (char)(SERDES_ENABLE | SERDES_RXEN);
+  volatile char *serdes = (char *) OUTPUTS_BASE + OUTPUTS_SERDES;
+  *serdes = serdes_controls;
+
+
   // Set up DAC
   int i = 0;
   while(1) {

Modified: gnuradio/branches/developers/matt/u2f/firmware/memory_map.h
===================================================================
--- gnuradio/branches/developers/matt/u2f/firmware/memory_map.h 2007-05-15 
02:51:01 UTC (rev 5472)
+++ gnuradio/branches/developers/matt/u2f/firmware/memory_map.h 2007-05-15 
04:45:35 UTC (rev 5473)
@@ -5,13 +5,17 @@
  */
 
 /////////////////////////////////////////////////////
-// Main RAM
+// Main RAM, Slave 0
 #define RAM_BASE 0x0000
 
 /////////////////////////////////////////////////////
-// SPI Core.  See core docs for more info
-#define SPI_BASE 0x2000   // Base address (16-bit)
+// Buffer RAM, Slave 1
+#define BUFFER_BASE 0x4000
 
+/////////////////////////////////////////////////////
+// SPI Core, Slave 2.  See core docs for more info
+#define SPI_BASE 0x8000   // Base address (16-bit)
+
 // Register address offsets
 #define SPI_TXRX0 0x000 
 #define SPI_TXRX1 0x004
@@ -44,13 +48,13 @@
 #define SPI_TXRX  1
 
 ////////////////////////////////////////////////
-// I2C
-#define I2C_BASE 0x4000
+// I2C, Slave 3
+#define I2C_BASE 0x9000
 
 
 ////////////////////////////////////////////////
-// GPIO
-#define GPIO_BASE 0x6000
+// GPIO, Slave 4
+#define GPIO_BASE 0xA000
 #define GPIO_DDR 0
 #define GPIO_IO 4
 #define GPIO_RX 0
@@ -58,21 +62,29 @@
 
 
 ///////////////////////////////////////////////////
-// Basic Outputs
-#define OUTPUTS_BASE 0x8000
+// Basic Outputs, Slave 5
+#define OUTPUTS_BASE 0xB000
 
 #define OUTPUTS_CLK 0
 #define OUTPUTS_SERDES 1
 #define OUTPUTS_ADC 2
 #define OUTPUTS_MISC 3
 
+#define SERDES_ENABLE 8
+#define SERDES_PRBSEN 4
+#define SERDES_LOOPEN 2
+#define SERDES_RXEN 1
 
 ///////////////////////////////////////////////////
-// DSP Core
-#define DSP_BASE 0xa000
+// DSP Core, Slave 6
+#define DSP_BASE 0xC000
 
 #define DSP_IAMP 0
 #define DSP_QAMP 2
 #define DSP_FREQ 4
 #define DSP_ISCALE 8
 #define DSP_QSCALE 10
+
+////////////////////////////////////////////////////
+// Settings Bus, Slave #7
+#define SLAVE7_BASE 0xD000





reply via email to

[Prev in Thread] Current Thread [Next in Thread]