[Commit-gnuradio] r5540 - in gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga: lib tb

[jcorgan]

Author: jcorgan
Date: 2007-05-25 13:59:03 -0600 (Fri, 25 May 2007)
New Revision: 5540

Modified:
   gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar.v
   
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_control.v
   gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.sav
   gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.v
Log:
work in progress

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar.v
===================================================================
--- gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar.v    
2007-05-25 16:36:59 UTC (rev 5539)
+++ gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar.v    
2007-05-25 19:59:03 UTC (rev 5540)
@@ -47,7 +47,9 @@
    output [15:0] rx_ech_q_o;   // Q channel processed echos to Rx FIFO
 
    wire          reset;                // Master application reset
-
+   wire         tx_enable;     // Transmitter enable
+   wire         rx_enable;     // Receiver enable
+   
    wire [13:0]          mag;           // temporary
    wire [31:0]          freq;          // temporary
    wire [31:0]          phs;           // temporary
@@ -55,15 +57,16 @@
    sar_control controller
      (.clk_i(clk_i),.rst_i(1'b0),.ena_i(1'b1),
       .s_strobe_i(s_strobe_i),.saddr_i(saddr_i),.sdata_i(sdata_i),
-      .reset_o(reset),.mag_o(mag),.freq_o(freq),.phs_o(phs));
+      .reset_o(reset),.tx_ena_o(tx_enable),.rx_ena_o(rx_enable),
+      .mag_o(mag),.freq_o(freq),.phs_o(phs));
 
    sar_tx transmitter
-     ( .clk_i(clk_i),.rst_i(reset),.ena_i(1'b1),
+     ( .clk_i(clk_i),.rst_i(reset),.ena_i(tx_enable),
        .mag_i(mag),.freq_i(freq),.phs_i(phs),
        .strobe_i(tx_strobe_i),.tx_i_o(tx_dac_i_o),.tx_q_o(tx_dac_q_o) );
    
    sar_rx receiver
-     ( .clk_i(clk_i),.rst_i(reset),.ena_i(1'b0),
+     ( .clk_i(clk_i),.rst_i(reset),.ena_i(rx_enable),
        .strobe_i(rx_strobe_i),.rx_in_i_i(rx_adc_i_i),.rx_in_q_i(rx_adc_q_i),
        .rx_strobe_o(rx_strobe_o),.rx_i_o(rx_ech_i_o),.rx_q_o(rx_ech_q_o) );
    

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_control.v
===================================================================
--- 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_control.v
    2007-05-25 16:36:59 UTC (rev 5539)
+++ 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/lib/sar_control.v
    2007-05-25 19:59:03 UTC (rev 5540)
@@ -23,7 +23,8 @@
 `include "../../../../usrp/firmware/include/fpga_regs_standard.v"
 
 module sar_control(clk_i,rst_i,ena_i,saddr_i,sdata_i,s_strobe_i,
-                  reset_o,mag_o,freq_o,phs_o);
+                  reset_o,tx_ena_o,rx_ena_o,
+                  mag_o,freq_o,phs_o);
 
    // System interface
    input         clk_i;                // Master clock @ 64 MHz
@@ -35,13 +36,14 @@
 
    // Configuration outputs
    output       reset_o;
+   output        tx_ena_o;
+   output        rx_ena_o;
+   
    output [13:0] mag_o;
    output [31:0] freq_o;
    output [31:0] phs_o;
 
    // Internal configuration
-   wire         tx_ena;
-   wire         rx_ena;
    wire         lp_ena;
    wire         dr_ena;
    wire         md_ena;
@@ -49,7 +51,7 @@
 
    // Configuration from host
    setting_reg #(`FR_USER_0) 
sr_mode(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),
-                                    
.out({chirps,md_ena,dr_ena,lp_ena,rx_ena,tx_ena,reset_o}));
+                                    
.out({chirps,md_ena,dr_ena,lp_ena,rx_ena_o,tx_ena_o,reset_o}));
                                     
    setting_reg #(`FR_USER_1) 
sr_mag(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),.out(mag_o));
    setting_reg #(`FR_USER_2) 
sr_freq(.clock(clk_i),.reset(rst_i),.strobe(s_strobe_i),.addr(saddr_i),.in(sdata_i),.out(freq_o));

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.sav
===================================================================
--- 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.sav    
    2007-05-25 16:36:59 UTC (rev 5539)
+++ 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.sav    
    2007-05-25 19:59:03 UTC (rev 5540)
@@ -1,9 +1,11 @@
-*-20.630867 3880800 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 
-1 -1 -1 -1 -1 -1 -1
+*-20.426014 4130000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 
-1 -1 -1 -1 -1 -1 -1
 @28
 sar_tb.clk
 sar_tb.ena
 sar_tb.rst
 sar_tb.uut.reset
+sar_tb.uut.tx_enable
+sar_tb.uut.rx_enable
 @200
 -
 @22
@@ -13,9 +15,9 @@
 @200
 -
 @28
-sar_tb.uut.transmitter.strobe_i
+sar_tb.tx_strobe
address@hidden
+sar_tb.uut.tx_dac_i_o[13:0]
+sar_tb.uut.tx_dac_q_o[13:0]
 @200
 -
address@hidden
-sar_tb.uut.tx_dac_i_o[13:0]
-sar_tb.uut.tx_dac_q_o[13:0]

Modified: 
gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.v
===================================================================
--- gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.v  
2007-05-25 16:36:59 UTC (rev 5539)
+++ gnuradio/branches/developers/jcorgan/sar-fe/gr-sar-fe/src/fpga/tb/sar_tb.v  
2007-05-25 19:59:03 UTC (rev 5540)
@@ -25,6 +25,8 @@
 
 `define FR_SAR_MODE            7'd64
 `define bmFR_SAR_MODE_RESET    32'h0001
+`define bmFR_SAR_MODE_TX        32'h0002
+`define bmFR_SAR_MODE_RX        32'h0004
 
 `define FR_SAR_AMPL             7'd65
 `define FR_SAR_FREQ             7'd66
@@ -129,6 +131,26 @@
       end
    endtask // reset
    
+   // Enable/disable transmitter
+   task enable_tx;
+      input enabled;
+      
+      begin
+        mode = enabled ? (mode | `bmFR_SAR_MODE_TX) : (mode & 
~`bmFR_SAR_MODE_TX);
+        write_cfg_register(`FR_SAR_MODE, mode);
+      end
+   endtask // enable_tx
+   
+   // Enable/disable receiver
+   task enable_rx;
+      input enabled;
+      
+      begin
+        mode = enabled ? (mode | `bmFR_SAR_MODE_RX) : (mode & 
~`bmFR_SAR_MODE_RX);
+        write_cfg_register(`FR_SAR_MODE, mode);
+      end
+   endtask // enable_rx
+   
    // Waveform amplitude
    task set_amplitude;
       input [13:0] amp;
@@ -165,6 +187,8 @@
         #20 set_amplitude(14'h1FFF);
         #20 set_frequency(32'h07FFFFFF);
         #20 set_phase(0);
+        #20 enable_tx(1);
+        #20 enable_rx(0);
         #20 set_reset(0);
         #10000;
       end