[Commit-gnuradio] r5784 - gnuradio/branches/developers/matt/u2f/sdr_lib

[matt]

Author: matt
Date: 2007-06-17 00:55:48 -0600 (Sun, 17 Jun 2007)
New Revision: 5784

Modified:
   gnuradio/branches/developers/matt/u2f/sdr_lib/cic_decim.v
Log:
reformatted for Verilog 2001 style


Modified: gnuradio/branches/developers/matt/u2f/sdr_lib/cic_decim.v
===================================================================
--- gnuradio/branches/developers/matt/u2f/sdr_lib/cic_decim.v   2007-06-17 
06:54:57 UTC (rev 5783)
+++ gnuradio/branches/developers/matt/u2f/sdr_lib/cic_decim.v   2007-06-17 
06:55:48 UTC (rev 5784)
@@ -21,31 +21,28 @@
 
 
 module cic_decim
-  ( clock,reset,enable,rate,strobe_in,strobe_out,signal_in,signal_out);
-   parameter bw = 16;
-   parameter N = 4;
-   parameter log2_of_max_rate = 7;
-   parameter maxbitgain = N * log2_of_max_rate;
-   
-   input clock;
-   input reset;
-   input enable;
-   input [7:0] rate;
-   input strobe_in,strobe_out; 
-   input [bw-1:0] signal_in;
-   output [bw-1:0] signal_out;
-   reg [bw-1:0] signal_out;
+  #(parameter bw = 16, parameter N = 4, parameter log2_of_max_rate = 7)
+    (input clock,
+     input reset,
+     input enable,
+     input [7:0] rate,
+     input strobe_in,
+     input strobe_out,
+     input [bw-1:0] signal_in,
+     output [bw-1:0] signal_out);
 
+   localparam       maxbitgain = N * log2_of_max_rate;
+   
    wire [bw+maxbitgain-1:0] signal_in_ext;
    reg [bw+maxbitgain-1:0]  integrator [0:N-1];
-   reg [bw+maxbitgain-1:0] differentiator [0:N-1];
-   reg [bw+maxbitgain-1:0] pipeline [0:N-1];
-   reg [bw+maxbitgain-1:0] sampler;
+   reg [bw+maxbitgain-1:0]  differentiator [0:N-1];
+   reg [bw+maxbitgain-1:0]  pipeline [0:N-1];
+   reg [bw+maxbitgain-1:0]  sampler;
    
-   integer i;
+   integer                 i;
    
    sign_extend #(bw,bw+maxbitgain) 
-      ext_input (.in(signal_in),.out(signal_in_ext));
+     ext_input (.in(signal_in),.out(signal_in_ext));
    
    always @(posedge clock)
      if(reset)
@@ -79,11 +76,10 @@
               pipeline[i] <= #1 pipeline[i-1] - differentiator[i];
            end
        end // if (enable && strobe_out)
-      
+   
    wire [bw+maxbitgain-1:0] signal_out_unnorm = pipeline[N-1];
-
+   
    cic_dec_shifter #(bw)
-       cic_dec_shifter(rate,signal_out_unnorm,signal_out);
+     cic_dec_shifter(rate,signal_out_unnorm,signal_out);
    
 endmodule // cic_decim
-