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[Commit-gnuradio] r8251 - usrp2/trunk/fpga/models
From: |
matt |
Subject: |
[Commit-gnuradio] r8251 - usrp2/trunk/fpga/models |
Date: |
Wed, 23 Apr 2008 14:19:15 -0600 (MDT) |
Author: matt
Date: 2008-04-23 14:19:15 -0600 (Wed, 23 Apr 2008)
New Revision: 8251
Modified:
usrp2/trunk/fpga/models/RAMB16_S36_S36.v
Log:
latest version
Modified: usrp2/trunk/fpga/models/RAMB16_S36_S36.v
===================================================================
--- usrp2/trunk/fpga/models/RAMB16_S36_S36.v 2008-04-23 20:09:05 UTC (rev
8250)
+++ usrp2/trunk/fpga/models/RAMB16_S36_S36.v 2008-04-23 20:19:15 UTC (rev
8251)
@@ -1,4 +1,4 @@
-// $Header:
/devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/unisims/RAMB16_S36_S36.v,v
1.9 2005/03/14 22:54:41 wloo Exp $
+// $Header:
/devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/unisims/RAMB16_S36_S36.v,v
1.10 2007/02/22 01:58:06 wloo Exp $
///////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995/2005 Xilinx, Inc.
// All Right Reserved.
@@ -6,7 +6,7 @@
// ____ ____
// / /\/ /
// /___/ \ / Vendor : Xilinx
-// \ \ \/ Version : 8.1i (I.13)
+// \ \ \/ Version : 10.1
// \ \ Description : Xilinx Functional Simulation Library Component
// / / 16K-Bit Data and 2K-Bit Parity Dual Port Block RAM
// /___/ /\ Filename : RAMB16_S36_S36.v
@@ -1346,7 +1346,7 @@
`else
-// $Header:
/devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/unisims/RAMB16_S36_S36.v,v
1.9 2005/03/14 22:54:41 wloo Exp $
+// $Header:
/devl/xcs/repo/env/Databases/CAEInterfaces/verunilibs/data/unisims/RAMB16_S36_S36.v,v
1.10 2007/02/22 01:58:06 wloo Exp $
///////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995/2005 Xilinx, Inc.
// All Right Reserved.
@@ -1354,7 +1354,7 @@
// ____ ____
// / /\/ /
// /___/ \ / Vendor : Xilinx
-// \ \ \/ Version : 8.1i (I.13)
+// \ \ \/ Version : 10.1
// \ \ Description : Xilinx Timing Simulation Library Component
// / / 16K-Bit Data and 2K-Bit Parity Dual Port Block RAM
// /___/ /\ Filename : RAMB16_S36_S36.v
@@ -1364,6 +1364,7 @@
// Revision:
// 03/23/04 - Initial version.
// 03/10/05 - Initialized outputs.
+// 02/21/07 - Fixed parameter SIM_COLLISION_CHECK (CR 433281).
// End Revision
`timescale 1 ps/1 ps
@@ -1555,9 +1556,9 @@
deassign dopb_out;
end
- initial begin : initialize_mems
+
+ initial begin
-`ifdef UNDEFINED
for (count = 0; count < 8; count = count + 1) begin
mem[count] = INIT_00[(count * 32) +: 32];
mem[8 * 1 + count] = INIT_01[(count * 32) +: 32];
@@ -1624,18 +1625,8 @@
mem[8 * 62 + count] = INIT_3E[(count * 32) +: 32];
mem[8 * 63 + count] = INIT_3F[(count * 32) +: 32];
end
-`else
- integer i;
- for (i = 0; i < 512; i = i + 1)
- begin
- mem[i] = 0;
- memp[i] = 0;
- end
-`endif
-
// initiate parity start
-`ifdef UNDEFINED
for (countp = 0; countp < 64; countp = countp + 1) begin
memp[countp] = INITP_00[(countp * 4) +: 4];
memp[64 * 1 + countp] = INITP_01[(countp * 4) +: 4];
@@ -1646,7 +1637,6 @@
memp[64 * 6 + countp] = INITP_06[(countp * 4) +: 4];
memp[64 * 7 + countp] = INITP_07[(countp * 4) +: 4];
end
-`endif
// initiate parity end
change_clka <= 0;
@@ -1682,11 +1672,11 @@
display_flag = 0;
end
"WARNING_ONLY" : output_flag = 0;
- "GENERATE_ONLY" : display_flag = 0;
+ "GENERATE_X_ONLY" : display_flag = 0;
"ALL" : ;
default : begin
- $display("Attribute Syntax Error : The Attribute
SIM_COLLISION_CHECK on RAMB16_S36_S36 instance %m is set to %s. Legal values
for this attribute are ALL, NONE, WARNING_ONLY or GENERATE_ONLY.",
SIM_COLLISION_CHECK);
+ $display("Attribute Syntax Error : The Attribute
SIM_COLLISION_CHECK on RAMB16_S36_S36 instance %m is set to %s. Legal values
for this attribute are ALL, NONE, WARNING_ONLY or GENERATE_X_ONLY.",
SIM_COLLISION_CHECK);
$finish;
end
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