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[Commit-gnuradio] r8423 - usrp2/trunk/fpga/sdr_lib
From: |
matt |
Subject: |
[Commit-gnuradio] r8423 - usrp2/trunk/fpga/sdr_lib |
Date: |
Tue, 13 May 2008 20:48:31 -0600 (MDT) |
Author: matt
Date: 2008-05-13 20:48:28 -0600 (Tue, 13 May 2008)
New Revision: 8423
Added:
usrp2/trunk/fpga/sdr_lib/add2.v
usrp2/trunk/fpga/sdr_lib/add2_reg.v
Log:
small blocks for addingin dsp functions
Added: usrp2/trunk/fpga/sdr_lib/add2.v
===================================================================
--- usrp2/trunk/fpga/sdr_lib/add2.v (rev 0)
+++ usrp2/trunk/fpga/sdr_lib/add2.v 2008-05-14 02:48:28 UTC (rev 8423)
@@ -0,0 +1,11 @@
+
+module add2
+ #(parameter WIDTH=16)
+ (input [WIDTH-1:0] in1,
+ input [WIDTH-1:0] in2,
+ output [WIDTH-1:0] sum);
+
+ wire [WIDTH:0] sum_int = {in1[WIDTH-1],in1} + {in2[WIDTH-1],in2};
+ assign sum = sum_int[WIDTH:1]; // Note -- will have some bias
+
+endmodule // add2
Added: usrp2/trunk/fpga/sdr_lib/add2_reg.v
===================================================================
--- usrp2/trunk/fpga/sdr_lib/add2_reg.v (rev 0)
+++ usrp2/trunk/fpga/sdr_lib/add2_reg.v 2008-05-14 02:48:28 UTC (rev 8423)
@@ -0,0 +1,17 @@
+
+module add2_reg
+ #(parameter WIDTH=16)
+ (input clk,
+ input [WIDTH-1:0] in1,
+ input [WIDTH-1:0] in2,
+ output reg [WIDTH-1:0] sum);
+
+ wire [WIDTH-1:0] sum_int;
+
+ add2 #(.WIDTH(WIDTH)) add2 (.in1(in1),.in2(in2),.sum(sum_int));
+
+ always @(posedge clk)
+ sum <= sum_int;
+
+endmodule // add2_reg
+
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