[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Commit-gnuradio] r8892 - usrp2/trunk/fpga/top/u2_rev2
From: |
jblum |
Subject: |
[Commit-gnuradio] r8892 - usrp2/trunk/fpga/top/u2_rev2 |
Date: |
Tue, 15 Jul 2008 16:00:48 -0600 (MDT) |
Author: jblum
Date: 2008-07-15 16:00:46 -0600 (Tue, 15 Jul 2008)
New Revision: 8892
Modified:
usrp2/trunk/fpga/top/u2_rev2/Makefile
Log:
ISE Makefile uses relative paths
Modified: usrp2/trunk/fpga/top/u2_rev2/Makefile
===================================================================
--- usrp2/trunk/fpga/top/u2_rev2/Makefile 2008-07-15 21:42:22 UTC (rev
8891)
+++ usrp2/trunk/fpga/top/u2_rev2/Makefile 2008-07-15 22:00:46 UTC (rev
8892)
@@ -24,12 +24,12 @@
##################################################
#XTCLSH := /opt/Xilinx/10.1/ISE/bin/lin/xtclsh
XTCLSH := xtclsh
-ISE_HELPER := $(shell pwd)/../tcl/ise_helper.tcl
+ISE_HELPER := ../tcl/ise_helper.tcl
##################################################
# Project Setup
##################################################
-BUILD_DIR := $(shell pwd)/build/
+BUILD_DIR := build/
export TOP_MODULE := u2_rev2
export PROJ_FILE := $(BUILD_DIR)$(TOP_MODULE).ise
@@ -51,7 +51,7 @@
##################################################
# Sources
##################################################
-export SOURCE_ROOT := $(shell pwd)/../../
+export SOURCE_ROOT := ../../../
export SOURCES := \
control_lib/CRC16_D16.v \
control_lib/atr_controller.v \
@@ -188,7 +188,7 @@
"Use Synchronous Set" Auto
export TRANSLATE_PROPERTIES := \
-"Macro Search Path" "$(SOURCE_ROOT)/coregen/"
+"Macro Search Path" "$(SOURCE_ROOT)coregen/"
QUICK_MAP_PROPERTIES := \
"Allow Logic Optimization Across Hierarchy" TRUE \
[Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Commit-gnuradio] r8892 - usrp2/trunk/fpga/top/u2_rev2,
jblum <=