[Discuss-gnuradio] Adaptive-computing chip could enable software-defined radio

[Steve Schear]

Adaptive-computing chip could enable software-defined radio
By Stephan Ohr, EE Times
Apr 29, 2002 (7:17 AM)
URL: http://www.eetimes.com/story/OEG20020429S0016


SAN FRANCISCO-QuickSilver Technology Inc. will announce this week an 
adaptive-computing machine that enables development of algorithm processors 
for a new-generation of multiband cellular radios. If the test chip lives 
up to its billing it could move highly touted software-defined radio a 
large step closer to reality.

An adaptive-computing machine, or ACM, can perform a number of cellular 
handset functions with higher performance at a fraction of the overhead of 
a general-purpose DSP, said Paul Master, QuickSilver's chief technology 
officer. The test chip being unveiled this week, he said, is particularly 
adept at processing key third-generation (3G) wireless standards, cdma2000 
and wideband CDMA. A software-defined radio - one that could implement GSM 
and Edge as well as CDMA cellular functions - could be built with one of 
these, Master said.

In a demonstration for EE Times, four test chips showed that the ACM could 
rapidly acquire cdma2000 basestation channels (a "searcher" function) and 
select the strongest from among several optimum choices via a "rake finger" 
function, one that finds the channel with the lowest bit-error rate.

The searcher function requires a 512-point complex fast Fourier transform, 
examining 215 possible phase points. It ordinarily takes 3.4 seconds on a 
general-purpose DSP, Master said. A 25-MHz board with four ACMs takes a 
little more than 1 second. A 16-ACM board running at 100 MHz would take 
about 0.06 seconds, he projected. Unlike a cell phone DSP, which could use 
software to exercise only part of its hardware to perform the initial 
search, the ACM could use all its hardware to run the task in a fraction of 
the time, then reconfigure itself to take on the next task.


'Very powerful concept'

"Reconfigurable computing definitely has a place in wireless apps," said 
Jeff Bier, president of Berkeley Design Technology Inc., a DSP architecture 
authority who has been anxious to study QuickSilver's thus-far mysterious 
architecture. "It's a very powerful concept - being able to rejigger the 
hardware, to 'morph it' so it can address each operation separately. But 
it's a very complicated thing to harness. Maybe QuickSilver has solved the 
problem."

The introduction will open the lid on the San Jose, Calif. company's 
contribution to reconfigurable computing, a technology that claims higher 
performance and power efficiency than general-purpose DSPs and 
microprocessors and greater flexibility than hardwired ASICs.

A general-purpose processor like the Pentium relies on extensive 
instruction-acquisition and address-generation machinery. As a result it 
cannot be as efficient as a vector processor, which executes a single 
instruction over and over. Even with a 500-MHz clock, the overall 
efficiency (measured by the proportion of its 10 million switches actually 
in use during an operation) is as low as 10 percent, Master said. With each 
Pentium generation, the number of transistors and the clock speed go up but 
the efficiency goes down, he said. A 100 million-transistor device clocked 
at 5 GHz might use less than 5 percent of the switches; a 
billion-transistor Pentium clocked at 20 GHz will likely be only 1 percent 
efficient in its use of silicon and power. To the extent that 
software-defined radio must rely on general-purpose processors and DSPs, 
authorities like Bob Brodersen of the University of California's Berkeley 
Wireless Technology Research Center have declared it a bogus goal.

FPGA makers have discovered that hardwired logic performs many 
communications functions faster and more efficiently than general-purpose 
DSPs. But Master said FPGA architectures process some communications 
algorithms well but not others. "If the architecture lends itself to what 
you're doing, great. But if it doesn't, you'll pay a 100x silicon penalty 
trying to shape the device to the force-fit function," he said.

QuickSilver's ACM can change its hardware architecture on demand - cycle by 
cycle, if necessary - to fit a specific algorithm processing function. 
Compared with a general-purpose processor, which gets about 5 percent 
computational power efficiency (CPE), or a hardwired ASIC, which gets 20 to 
30 percent, an ACM has 50 to 70 percent CPE, QuickSilver said.