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Re: [Discuss-gnuradio] Re: synchronizing sound cards in a cluster


From: Eric Blossom
Subject: Re: [Discuss-gnuradio] Re: synchronizing sound cards in a cluster
Date: Thu, 13 Mar 2003 21:23:23 -0800
User-agent: Mutt/1.4i

On Thu, Mar 13, 2003 at 10:19:21PM -0500, Dave Emery wrote:
> On Thu, Mar 13, 2003 at 03:50:02PM -0800, Steve Schear wrote:
> > 
> > Does the upcoming USB 2.0 card have a master/slave clock locker?  Might be 
> > nice for multiple card systems.
> > 
> > steve
> 
>       As I have said in another post, I think that there are two
> related features that would be most useful.
> 
>       1.  External trigger input (and ideally also output allowing
> multiple cards to be slaved to each other without needed an external
> source of sample clock)).
> 
>       2.  Some provision for using an external standard frequency
> reference to generate sample timing, thus allowing highly accurate
> GPS time and frequency to be used for precise sampling where 
> one cares about exact sample frequency.   Accepting a 10 mhz industry
> standard reference frequency here would be ideal.

I should probably let Matt answer this, but... 

If you want to run the converters at full speed, I don't think you're
going to get external trigger:

  (1) The on board oscillator is 120 MHz.  Clock jitter needs to be
      held to single digit picoseconds for us to be able to
      successfully IF sample.

  (2) If we were to accept a 10 MHz timing reference, we'd need to
      multiply it a bunch of times, and then get the jitter worked
      out of it.  Not easy to do.

On the other hand, if you want to sample substantially slower than 60
MHz, it's probably possible to get what you want.  There will be i/o
pins brought out directly from the FPGA to connectors on the board
edge.  You are free to define the guts of the FPGA.  It's an SRAM
based device and it's configuration bitstream is loaded at runtime by
by GNU Radio through the driver.  This implies that you get to control
the clocks of the A/D's.  As I recall, the D/A's are driven directly
from the oscillator, so you'd need to implement your timing on them by
selecting which samples of the 120MS/s are the ones you want.


A quick review of the specs of the board:

  2 or 4   120 MS/second D/A's
  2 or 4   60 MS/second A/D's
  200K or 300K gate FPGA
  USB 2 interface

Whether there are two or four analog ins and outs mostly depends on
price.  The number of bits of the A/D's and D/A's depends on their
number.  We're pin limited on the FPGA.  Fewer converters, more bits.
Stay tuned for further details as they become available...

Eric




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