[Discuss-gnuradio] USRP Fixed-Point Simulation Block

[Brian Padalino]

Would it be of any interest for the Verilog in the USRP to actually
match bit-for-bit a simulation block that can be run on the host
machine?

Basically just float -> integer -> fixed-point up/down conversion
filtering for the halfband FIR and/or CIC filters and the CORDIC that
occurs?

Just trying to gauge the interest in such a block.

Thanks,
Brian