On Mon, Mar 24, 2008 at 1:02 AM, Mohammad Hamed Firooz
<address@hidden> wrote:
Hi,
As you may know, BBN guys have developed a receiver for 802.11b. But
due to the USB limitation, they had to cut the spectrum which leads to
low SNR. We have developed a new receiver by doing some operation
(especially de-spreading) inside the FPGA (before sending data to USB).
Therefore, our receiver use the whole spectrum to abstract the data.
you can find more information and the codes in our website:
http://span.ece.utah.edu/pmwiki/pmwiki.php?n=Main.80211bReceiver
So, where's the Verilog for the changed FPGA build?
Brian