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Re: [Discuss-gnuradio] Deterministic TX phase on a pair of RFX400

From: Matt Ettus
Subject: Re: [Discuss-gnuradio] Deterministic TX phase on a pair of RFX400
Date: Mon, 30 Jun 2008 13:17:51 -0700
User-agent: Thunderbird (X11/20080501)

Dan Halperin wrote:
Hash: SHA1

On Jun 2, 2008, at 3:20 PM, Matt Ettus wrote:
The RFX400s have PLL chips on them. The PLL chips on the 2 boards are fed the same reference clock since it comes from the motherboard. However, they both divide the clock down by the "R Divider" value, which is typically 8. The RFX400 has a second divide-by-2 as well for a total of 16. Thus there would be an 8-way ambiguity, since the dividers could be at different phases. Thus the relative phases between 2 boards can only be one of 16 discrete values. This value will stay constant as long as you don't retune to a different frequency or allow the pll enable pin to go low.

If you set your RF frequency to a multiple of 64 MHz, however, there will be no ambiguity.

What of the above is {the same, different} for the RFX2400's?

The 2400s don't have the extra divide by 2.

I'm using Rev 4.2 USRPs with RFX2400 Rev 30s. Presumably with Rev 4 USRPs but older RFX2400s with 64 MHz oscillators I could make the mods necessary to use the FPGA refclk.



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