The current inband RX chain looks like:
N RX Sample Streams -> N RX Sample FIFOs -> 1 Packet Builder -> 1
USB FIFO -> FX2 USB Interface
What it should look like (in my opinion):
N RX Sample Streams -> N Packet Builders -> N Packet FIFOs -> N:1
FIFO MUX -> FX2 USB Interface
I agree with this solution, I think this is what Ketan's idea was that
I explained terribly in my last email. Hopefully removing the USB
FIFO will allow the extra packet builders room on the chip.
On a side note, it might be interesting to have a command that can
turn on the receiver and receive a specific number of inband packets.
For example, if you know you may be receiving a transmission that is
only 2ms long in a specific slot, it might be beneficial to only
schedule 2ms (+/- a guard time) worth of samples to be delivered to
the host, freeing up more CPU cycles for signal processing and using
the USB bandwidth a little more efficiently.
I'm not too concerned about this, although it would certainly improve
the flexibility of the receiver. This might also require redesigning
the usrp_rx mblock, but I'm not confident about that.