It could fit into the Cyclone. It really all depends on the bandwidth
you want to use, and how efficient of an FPGA coder you are. What you
are proposing requires pretty considerable skill not only in
reprogramming the FPGA but also in wireless communications.
Modulation, symbol rate, FEC scheme, distance, line-of-sight, transmit
power - the list goes on for quite a while. These are the parameters
you have to tweak to get your design to fit within the FPGA.
As for multipath, you can try to use a RAKE receiver to help mitigate
this as I don't think the Cyclone could really handle having an
equalizer run at anything other than extremely low rates.