[Discuss-gnuradio] Re: usrp1 harmonic issue

[feldmaus]

Eric Blossom <eb <at> comsec.com> writes:

> 
>   /*!
>    * \brief Enable/disable automatic DC offset removal control loop in FPGA
>    *
>    * \param bits  which control loops to enable
>    * \param mask  which \p bits to pay attention to
>    *
>    * If the corresponding bit is set, enable the automatic DC
>    * offset correction control loop.
>    *
>    * <pre>
>    * The 4 low bits are significant:
>    *
>    *   ADC0 = (1 << 0)
>    *   ADC1 = (1 << 1)
>    *   ADC2 = (1 << 2)
>    *   ADC3 = (1 << 3)
>    * </pre>
>    *
>    * By default the control loop is enabled on all ADC's.
>    */
>   bool set_dc_offset_cl_enable(int bits, int mask);
If i want to set no automatic ADC control loop, what do i have to do?
set_dc_offset_cl_enable(int(0), int(0))

DEC --> BIN
int BITS: 0 --> 0000 (for ADC_0)
int MASK: 0 --> 0000
RESULT: 0000
In this case no ADC will get automatic loop ???
Is this correct ?

Regards Markus