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[Discuss-gnuradio] USRP1 DBSRX 10MHz reference clock

From: Kutik
Subject: [Discuss-gnuradio] USRP1 DBSRX 10MHz reference clock
Date: Tue, 16 Jun 2009 08:23:37 -0700 (PDT)

I would like to change the USRP master clock to 10MHz.

I call urx->set_fpga_master_clock_freq(10e6) prior to

I wonder how to set the REFCLK_DIVISOR in db_dbs_rx::_refclk_divisor().

>From all examples I have seen the (master_clock/REFCLK_DIVISOR) is 4MHz.
This would mean REFCLK_DIVISOR must be 2.5, but on the other hand it must be
an integer..

Can I set the REFCLK_DIVISOR to 3 (resulting in Max2118 clock 3.33MHz)? Or
would you recommend something else?
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