As a quick test I then connected each usrp2 to a complex oscilloscope (i.e scopesink2.scope_sink_c)
This sort of works -- checking on the test clock pins on each USRP2 the 100MHz clocks are locked.
Unfortunately putting in a sine wave from a lab sig gen garbage is seen -- a constant DC signal on the BasicRX and what looks like modulated noise on the DBSRX (testing at different frequencies on both boards) -- the signal looks as expected if the config_mimo line is commented (and the usrp2's restarted).
Am I missing something obvious?
Both USRP's have the latest compiled firmware I could find (11370). We're on a svn version from a few months ago due to the old short packet problem -- could this be the issue though it seems more hardware-y as from reading the firmware code all that command should do is change one of the output registers on the microprocessor?
I'm also trying to attach the timestamp data do each sample -- as far as I can tell this is sent to give the sample timestamp for the first sample in each ethernet frame (then incremented by 1 for each subsequent sample in the frame)
I think I have to create a new C++ block based on USRP2_SOURCE_32FC() to define a second output stream and connect the rx-metadata::timestamp (which is a uint32) to this output -- is this correct or can I access the data within a custom (or current) block further down the line somehow already?