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[Discuss-gnuradio] Issues concerning the FPGA programming


From: Eduardo Lloret Fuentes
Subject: [Discuss-gnuradio] Issues concerning the FPGA programming
Date: Wed, 26 Jan 2011 10:34:29 +0100

Good morning,

I have several questions concerning the FPGA programming of the USRP2 and I would appreciate if you could help me. First of all, I am using GNU Radio 3.3.0 and Ubuntu 10.10.

One of the things I have not very clear is the role of the firmware on the aeMB. Reading the FAQ I found: "It performs configuration and status reporting for all the FPGA peripherals, manages the control channel for the GbE transport, and handles RF daughterboard operation". I would like to know if there is another source of information than read the code. I need to change the FGPA code, so I suppose that I need to change the firmware for the aeMB processor too. Could you confirm me this point? In order to be more concrete, I have two different scenarios:
  1. One scenario consists in reprogram the FGPA with a complete new design. This would be only to use the USRP2's FPGA connected directly to a signal generator through the LFRX and to an oscilloscope through the LFTX. It is a part of a simple DSP demo I need to perform. After that, I would program the FPGA with the original code.
  2. Another scenario consists in add a block (for example a filter) to the actual FPGA code using the free space it has. I read in the FAQ that around 22 of the multipliers are free and about the 60% of the logic area. The configuration would be the same as above (signal generator and oscilloscope).
Another thing I would like to check is the process to add a block to the FPGA. These are the steps I have in mind to get the code
  1. Download the code using git clone git://git.ettus.com/ettus/fpga.git
  2. Use the branch ise12 typing git checkout ise12
  3. Go to the u2_rev3 folder
What is the next step to create the project for Xilinx ISE? Can I just add all the source files to a new project in ISE?

I suppose that when I modify the verilog files to add my block, then I need to modify also all the makefiles and go to the top folder to run make clean && make bin. Am I right?

I read in the mailing list archive that if I am going to use the raw ethernet code, I should use the master branch and the ISE 10.x tool instead of the ise12 branch and ISE 12.x tool. Is this correct?

Seeking in the Xilinx website ( http://www.xilinx.com/ise/ossupport/index.htm ) I read that only Red Hat and SuSe have support. Have you noticed any issue related to Ubuntu? Should I change to Red Hat in order to avoid any problem?

I know that I ask for a lot of answers and I apologize but this is a new field of study for me.

Thank you very much.

Greetings.

Eduardo Lloret.

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