[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Discuss-gnuradio] 100 Msps FPGA code for USRP N210 - Gnu Spectrum a
From: |
Marc Epard |
Subject: |
Re: [Discuss-gnuradio] 100 Msps FPGA code for USRP N210 - Gnu Spectrum analyzer |
Date: |
Sat, 19 Mar 2011 07:38:39 -0500 |
On Mar 18, 2011, at 3:58 PM, Moeller wrote:
> Thanks for publishing. This is very impressive, using Gnuradio as a spectrum
> analyzer.
Thanks. It's been a fun project.
> - What about compensating the spectral shape within the measurement bandwidth?
Seems doable. I'm only now learning signal processing (I'm software guy by
training and trade), so I'll do some investigation. If someone else wants to
take it on, it's on my list to post the MATLAB code, too, but I need to do some
polishing first.
> - Movie: why do you have spectral lines walking in both directions?
Good question. They also appear in the color plots as diagonals in opposite
directions. Our hunch is that they're related to the DBSRX2's frequency
synthesis and a function of the center frequency.
> Can it be predicted and compensated?
Seems likely. We've been playing with ways to isolate the components related to
the baseband the those related to the center frequency.
> - Can half of your scan speed be achieved by using original FPGA,
> taking snapshots and do all processing on the PC? Or do you need some
> special processing that needs a better timing within the FPGA?
I'm sure that would work. The code that drives the scan and crunches the data
doesn't really care what the sample rate is. The scan step for the plots I
posted was 100 KHz. Lately we've been using 100MHz/1024 to be the same as the
periodogram resolution, which makes horizontal steps and vertical steps in the
periodogram matrix the same. The movie speed is a result of the 60 frames per
second rate of the tools I used to make it. When viewing it in MATLAB, we
usually use much higher frame rates.
We didn't really start out to do a spectrum analyzer. We're working on a filter
that needs to operate at 100 Msps in the FPGA so we wanted to see what the
signal looks like right out of the ADCs. Then we noticed internal noise in the
system and wanted to see the big picture so we could pick out a quiet place to
do our testing and here we are.
-Marc