Re: [Gcl-devel] Re: Flushing the d-cache (was Re: BFD relocations)

[Camm Maguire]

Greetings, and thanks for your reply!

With or without the loop, I'm able to build gcl/maxima on arm, and run
most of the 'make test' in the maxima package without failure.  Up
until this point:  is this still not a data cache flushing issue?
SIGILL received, and the assembly and registers look fine in gdb.  As
background, gcl is loading compiled objects at a certain place in
memory, relocating the symbols, (supposedly) flushing the data cache,
and then executing the object.  

I still see this behavior even if all attempts to flush the data cache
are removed.  Makes me think that the swi instruction is no working.
Are there alignment requirements on the arguments?  Why aren't
a1,a2,a3 shown in the assembly?  I've included the CLEAR_CACHE code
and its assembly below as well.

Any pointers/ideas most appreciated!  Arm maxima is very close!


=============================================================================

(Many correct results)
....

..Which was correct
/* ********************** Problem 24. *************** */ 
%Input is
         1/2        1/2  1/2    - p T
SPECINT(T    %J (2 A    T   ) %E     , T)
               1


The result is
          - A/p
SQRT(A) %E
---------------
       2
      p

..Which was correct
/* ********************** Problem 25. *************** */ 
%Input is
         3/2               - p T
SPECINT(T    %M      (T) %E     , T)
               1/2, 1


The result is
       1                1
6 (--------- + --------------------)
         1          1         1   2
   1 - -----   (p + -) (1 - -----)
           1        2           1
       p + -                p + -
           2                    2
------------------------------------
                   1 4
              (p + -)
                   2

..Which was correct
/* ********************** Problem 26. *************** */ 
%Input is
(ASSUME(p > A), TRUE)


The result is
TRUE

..Which was correct
/* ********************** Problem 27. *************** */ 
%Input is
          A T  2      1/2    - p T
SPECINT(%E    T  ERF(T   ) %E     , T)


The result is
           1                    1                          3
15 (--------------- - ---------------------- + -------------------------)
           1                     1       3/2            2    1       5/2
    SQRT(----- + 1)   (p - A) (----- + 1)      4 (p - A)  (----- + 1)
         p - A                 p - A                       p - A
-------------------------------------------------------------------------
                                       7/2
                              4 (p - A)

..Which was correct
Congratulations: No differences!
No Errors Found

Program received signal SIGILL, Illegal instruction.
0x00036ee0 in number_to_double (x=0xb7212c) at number.c:239
239                     return(number_to_double(x->rat.rat_num) /
(gdb) hello
hello
hello
hello
hello
disassemble
disassemble
Dump of assembler code for function number_to_double:
0x36e58 <number_to_double>:     mov     r12, sp
0x36e5c <number_to_double+4>:   stmdb   sp!, {r4, r11, r12, lr, pc}
0x36e60 <number_to_double+8>:   sfm     f4, 1, [sp, -#12]!
0x36e64 <number_to_double+12>:  sub     r11, r12, #4    ; 0x4
0x36e68 <number_to_double+16>:  sub     sp, sp, #4      ; 0x4
0x36e6c <number_to_double+20>:  str     r0, [r11, -#32]
0x36e70 <number_to_double+24>:  ldr     r3, [r11, -#32]
0x36e74 <number_to_double+28>:  ldrb    r3, [r3]
0x36e78 <number_to_double+32>:  sub     r3, r3, #1      ; 0x1
0x36e7c <number_to_double+36>:  cmp     r3, #4  ; 0x4
0x36e80 <number_to_double+40>:  ldrls   pc, [pc, r3, lsl #2]
0x36e84 <number_to_double+44>:  b       0x36f0c <number_to_double+180>
0x36e88 <number_to_double+48>:  muleq   r3, r12, lr
0x36e8c <number_to_double+52>:  andeq   r6, r3, r12, lsr #29
0x36e90 <number_to_double+56>:  andeq   r6, r3, r0, asr #29
0x36e94 <number_to_double+60>:  andeq   r6, r3, r8, ror #29
0x36e98 <number_to_double+64>:  streqd  r6, [r3], -r8
0x36e9c <number_to_double+68>:  ldr     r3, [r11, -#32]
0x36ea0 <number_to_double+72>:  ldr     r3, [r3, #4]
0x36ea4 <number_to_double+76>:  fltd    f0, r3
0x36ea8 <number_to_double+80>:  b       0x36f1c <number_to_double+196>
0x36eac <number_to_double+84>:  ldr     r0, [r11, -#32]
---Type <return> to continue, or q <return> to quit---

0x36eb0 <number_to_double+88>:  bl      0x35d34 <big_to_double>
0x36eb4 <number_to_double+92>:  stfd    f0, [sp, -#8]!
0x36eb8 <number_to_double+96>:  ldmia   sp!, {r3, r4}
0x36ebc <number_to_double+100>: b       0x36f1c <number_to_double+196>
0x36ec0 <number_to_double+104>: ldr     r3, [r11, -#32]
0x36ec4 <number_to_double+108>: ldr     r0, [r3, #8]
0x36ec8 <number_to_double+112>: bl      0x36e58 <number_to_double>
0x36ecc <number_to_double+116>: mvfd    f4, f0
0x36ed0 <number_to_double+120>: ldr     r3, [r11, -#32]
0x36ed4 <number_to_double+124>: ldr     r0, [r3, #4]
0x36ed8 <number_to_double+128>: bl      0x36e58 <number_to_double>
0x36edc <number_to_double+132>: dvfd    f4, f4, f0
0x36ee0 <number_to_double+136>: mvfd    f0, f4
0x36ee4 <number_to_double+140>: b       0x36f1c <number_to_double+196>
0x36ee8 <number_to_double+144>: ldr     r3, [r11, -#32]
0x36eec <number_to_double+148>: ldfs    f0, [r3, #4]
0x36ef0 <number_to_double+152>: mvfd    f0, f0
0x36ef4 <number_to_double+156>: b       0x36f1c <number_to_double+196>
0x36ef8 <number_to_double+160>: ldr     r3, [r11, -#32]
0x36efc <number_to_double+164>: ldmib   r3, {r3, r4}
0x36f00 <number_to_double+168>: stmdb   sp!, {r3, r4}
0x36f04 <number_to_double+172>: ldfd    f0, [sp], #8
0x36f08 <number_to_double+176>: b       0x36f1c <number_to_double+196>
---Type <return> to continue, or q <return> to quit---q
q
Quit
(gdb) hello
i reg f0
i reg f0
f0             0        (raw 0x000000000000000000000000)
(gdb) i reg f4
i reg f4
f4             0        (raw 0x000000000000000000000000)
=============================================================================
#define CLEAR_CACHE do {\
  void *v=memory->cfd.cfd_start,*ve=v+memory->cfd.cfd_size; \
  register unsigned long _beg __asm ("a1") = (unsigned long)(v);        \
  register unsigned long _end __asm ("a2") = (unsigned long)(ve);\
  register unsigned long _flg __asm ("a3") = 0;                 \
  __asm __volatile ("swi 0x9f0002               @ sys_cacheflush"       \
                    : /* no outputs */                                  \
                    : /* no inputs */                                   \
                    : "a1");                                            \
} while (0)

 82c:   e1a03000        mov     r3, r0
 830:   e3530000        cmp     r3, #0  ; 0x0
 834:   0a00020f        beq     844 <fasload+0x620>
 838:   e3a03000        mov     r3, #0  ; 0x0
 83c:   e50b3018        str     r3, [fp, -#24]
 840:   ea000213        b       854 <fasload+0x630>
 844:   e59f00a8        ldr     r0, [pc, #168]  ; 8f4 <fasload+0x6d0>
 848:   ebfffffe        bl      0 <round_up>
 84c:   e1a03000        mov     r3, r0
 850:   e50b3018        str     r3, [fp, -#24]
 854:   e51b0134        ldr     r0, [fp, -#308]
 858:   ebfffffe        bl      0 <round_up>
 85c:   e51b3120        ldr     r3, [fp, -#288]
 860:   e5933004        ldr     r3, [r3, #4]
 864:   e50b3154        str     r3, [fp, -#340]
 868:   e51b3120        ldr     r3, [fp, -#288]
 86c:   e5932008        ldr     r2, [r3, #8]
 870:   e51b3154        ldr     r3, [fp, -#340]
 874:   e0833002        add     r3, r3, r2
 878:   e50b3158        str     r3, [fp, -#344]
 87c:   ef9f0002        swi     0x009f0002
 880:   e51b011c        ldr     r0, [fp, -#284]
 884:   e51b1120        ldr     r1, [fp, -#288]
 888:   e51b2018        ldr     r2, [fp, -#24]
 88c:   e3a03000        mov     r3, #0  ; 0x0
 890:   ebfffffe        bl      0 <round_up>
 894:   e51b212c        ldr     r2, [fp, -#300]
 898:   e59f3048        ldr     r3, [pc, #72]   ; 8e8 <fasload+0x6c4>
 89c:   e5832000        str     r2, [r3]
 8a0:   e51b2130        ldr     r2, [fp, -#304]
 8a4:   e59f3040        ldr     r3, [pc, #64]   ; 8ec <fasload+0x6c8>
 8a8:   e5832000        str     r2, [r3]
 8ac:   e59f3094        ldr     r3, [pc, #148]  ; 948 <fasload+0x724>
 8b0:   e5930000        ldr     r0, [r3]
 8b4:   ebfffffe        bl      0 <round_up>
 8b8:   e1a02000        mov     r2, r0
 8bc:   e59f3088        ldr     r3, [pc, #136]  ; 94c <fasload+0x728>
 8c0:   e1520003        cmp     r2, r3
 8c4:   0a000234        beq     8d8 <fasload+0x6b4>
 8c8:   e59f0080        ldr     r0, [pc, #128]  ; 950 <fasload+0x72c>
 8cc:   e51b3120        ldr     r3, [fp, -#288]
=============================================================================

Philip Blundell <address@hidden> writes:

> On Fri, 2002-06-14 at 16:51, Camm Maguire wrote:
> > #define CLEAR_CACHE do {\
> >   void *v=memory->cfd.cfd_start,*ve=v+memory->cfd.cfd_size; \
> >   for (;v<ve;v+=16)   {   \
> >        register unsigned long _beg __asm ("a1") = (unsigned long)(v);       
> > \
> >        register unsigned long _end __asm ("a2") = (unsigned long)(v+16);\
> >        register unsigned long _flg __asm ("a3") = 0;                        
> > \
> >        __asm __volatile ("swi 0x9f0002              @ sys_cacheflush"       
> > \
> >                 : /* no outputs */                                  \
> >                 : /* no inputs */                                   \
> >                 : "a1");                                            \
> >        }\
> 
> You don't need the loop.  The arm sys_cacheflush can be given arbitrary
> regions, it works the cache line size out for itself.
> 
> p.
> 
> 
> _______________________________________________
> Gcl-devel mailing list
> address@hidden
> http://mail.gnu.org/mailman/listinfo/gcl-devel
> 
> 

-- 
Camm Maguire                                            address@hidden
==========================================================================
"The earth is but one country, and mankind its citizens."  --  Baha'u'llah