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[Guile-commits] 400/437: Correct missing jit_unget_reg calls
From: |
Andy Wingo |
Subject: |
[Guile-commits] 400/437: Correct missing jit_unget_reg calls |
Date: |
Mon, 2 Jul 2018 05:15:04 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit fd57359498c8712370f27dcb7a6ad4c92946183b
Author: Paulo Andrade <address@hidden>
Date: Wed Nov 4 17:05:51 2015 -0200
Correct missing jit_unget_reg calls
---
lib/jit_x86-x87.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/lib/jit_x86-x87.c b/lib/jit_x86-x87.c
index af911b1..184ca1e 100644
--- a/lib/jit_x86-x87.c
+++ b/lib/jit_x86-x87.c
@@ -891,6 +891,7 @@ _x87_ldxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_int32_t r2)
reg = jit_get_reg(jit_class_gpr);
addr(rn(reg), r1, r2);
x87_ldr_f(r0, rn(reg));
+ jit_unget_reg(reg);
#else
fldsm(0, r1, r2, _SCL1);
fstpr(r0 + 1);
@@ -957,6 +958,7 @@ _x87_stxr_f(jit_state_t *_jit, jit_int32_t r0, jit_int32_t
r1, jit_int32_t r2)
reg = jit_get_reg(jit_class_gpr);
addr(rn(reg), r0, r1);
x87_str_f(rn(reg), r2);
+ jit_unget_reg(reg);
#else
if (r2 == _ST0_REGNO)
fstsm(0, r0, r1, _SCL1);
@@ -1172,6 +1174,7 @@ _x87_ldxr_d(jit_state_t *_jit, jit_int32_t r0,
jit_int32_t r1, jit_int32_t r2)
reg = jit_get_reg(jit_class_gpr);
addr(rn(reg), r1, r2);
x87_ldr_d(r0, rn(reg));
+ jit_unget_reg(reg);
#else
fldlm(0, r1, r2, _SCL1);
fstpr(r0 + 1);
@@ -1238,6 +1241,7 @@ _x87_stxr_d(jit_state_t *_jit, jit_int32_t r0,
jit_int32_t r1, jit_int32_t r2)
reg = jit_get_reg(jit_class_gpr);
addr(rn(reg), r0, r1);
x87_str_d(rn(reg), r2);
+ jit_unget_reg(reg);
#else
if (r2 == _ST0_REGNO)
fstlm(0, r0, r1, _SCL1);
- [Guile-commits] 209/437: Correct float division and LX with stop code generation., (continued)
- [Guile-commits] 209/437: Correct float division and LX with stop code generation., Andy Wingo, 2018/07/02
- [Guile-commits] 280/437: Implement the new jit_set_code interface., Andy Wingo, 2018/07/02
- [Guile-commits] 284/437: ARM: Do not emit a nop stack adjust instruction., Andy Wingo, 2018/07/02
- [Guile-commits] 345/437: PPC: Implement and use mcrxr emulation by default, Andy Wingo, 2018/07/02
- [Guile-commits] 246/437: Use the logic to workaround float NaN and Inf Hercules bug conditional, Andy Wingo, 2018/07/02
- [Guile-commits] 363/437: Correct typo, Andy Wingo, 2018/07/02
- [Guile-commits] 383/437: ia64: Implement cache flush., Andy Wingo, 2018/07/02
- [Guile-commits] 371/437: Correct read of freed memory, Andy Wingo, 2018/07/02
- [Guile-commits] 342/437: x86: Implement support for the x32 abi, Andy Wingo, 2018/07/02
- [Guile-commits] 416/437: Build and pass all tests on 32 and 64 bit sparc, Andy Wingo, 2018/07/02
- [Guile-commits] 400/437: Correct missing jit_unget_reg calls,
Andy Wingo <=
- [Guile-commits] 418/437: Correct typo and values in jit_sparc-sz.c, Andy Wingo, 2018/07/02
- [Guile-commits] 359/437: ARM: Regenerate size table for hard float armv7 or newer., Andy Wingo, 2018/07/02
- [Guile-commits] 396/437: Move definition of jit_va_ codes, cosmetic change., Andy Wingo, 2018/07/02
- [Guile-commits] 407/437: Update copyright year, Andy Wingo, 2018/07/02
- [Guile-commits] 435/437: Add GUILE_ENABLE_JIT macro, Andy Wingo, 2018/07/02
- [Guile-commits] 367/437: X86: No longer make st7 available as a temporary, Andy Wingo, 2018/07/02
- [Guile-commits] 406/437: Adapt for binutils 2.29, Andy Wingo, 2018/07/02
- [Guile-commits] 395/437: Use an actual, invalid code, as last jit code., Andy Wingo, 2018/07/02
- [Guile-commits] 344/437: ARM: Better check for constants offset overflow, Andy Wingo, 2018/07/02
- [Guile-commits] 351/437: PPC: Only call binutils function if it is available, Andy Wingo, 2018/07/02