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[guss-commit] guss ./ChangeLog ./ ./ ./...

From: Johan Rydberg
Subject: [guss-commit] guss ./ChangeLog ./ ./ ./...
Date: Wed, 26 Jun 2002 12:25:47 -0400

CVSROOT:        /cvsroot/guss
Module name:    guss
Changes by:     Johan Rydberg <address@hidden>  02/06/26 12:25:47

Modified files:
        .              : ChangeLog cgen-defs.h 
                         configure hw-core.c hw-core.h 
                         hw-uart.c hw.c sim-arange.c sim-core.h 
                         sim-cpu.c sim-engine.c sim-engine.h 
                         sim-profile.c sim-scache.c sim-scache.h 
        openrisc       : hw-tick.c openrisc-decode.c openrisc-decode.h 
                         openrisc-semsw.c openrisc-tdep.c openrisc.h 
Added files:
        .              : sim-gdb.c sim-gdb.h 
        doc            : guss.texi mdate-sh 
                         stamp-vti version.texi 

Log message:
        * openrisc/openrisc-decode.c (sim_idesc_lookup_virtual):
        (insert_chained_breakpoint): New function.
        (openrisc_decode_insn): Set pc is abuf.  Insert breakpoint
        if needed.
        (sim_engine_start_decode_current): Chain insns.
        * openrisc/openrisc-semsw.c (sim_engine_init_semantics):
        Disbale OPENRISC_INSN_X_CMOV for the moment.
        * openrisc/openrisc-decode.h (enum openrisc_insn_type):
        (struct insn_desc): Add pc and chain.
        * openrisc/openrisc.h (INTERMEDIATE_SCALE): Redefined.
        (TARGET_NUM_GDB_REGISTERS): Defined.
        * openrisc/openrisc-tdep.c (sim_gdb_fetch_registers): New function.
        (sim_gdb_set_registers): Likewise.
        * hw-core.c (core_dma_read_buffer): New function.
        * hw-core.h (core_dma_read_buffer): Prototype.
        * sim-scache.c (flush_scache): Initialize insn chain.
        * sim-profile.c (sim_profile_print_insn): Updated to fit
        new insn idesc table.
        * sim-core.h (sim_desc ): Add breakpoint_range.
        (STATE_BREAKPOINT_RANGE): Defined.
        * sim-engine.h (GET_PC_FAST): Defined.
        (sim_event_deschedule): Prototype.
        * sim-engine.c (sim_engine_run_restart): New function.
        (sim_engine_run_full): Add ugly hack to fix bug with
        event handling.
        (sim_event_schedule): Return the event structure.  Call
        callers changed.
        (sim_event_deschedule): New function.
        * toplevel.c (main): Initialize gdb commands.
        * doc: New directory, new files.
        * Check for object and execute suffixes.
        New argument; --with-hw.  Generate hw_list and hw_objs.
        Generate file doc/Makefile.
        * configure: Regenerate.
        * (hw-list.h): New rule.
        (guss$(EXEEXT)): Renamed from guss.
        (SUBDIRS): Add doc.
        (guss_SOURCES): Add sim-gdb.c.
        * Regenerate.
        * hw.c: Include generated list of hardware components instead of
        using static list.
        * sim-arange.c: Update includes.
        * hw-uart.c (open_file): Return 0 when failing to open file, to
        get rid of the unknown attribute error message.
        * cgen-defs.h (enum virtual_insn_type): Add VIRTUAL_INSN_BREAKPOINT.
        * sim-cpu.c (sim_cpu_finish_run): Add ugly hack for machines
        with delay slots, to produce the correct PC value.
        * sim-scache.c (sim_scache_flush_range): New function.
        * sim-scache.h (sim_scache_flush_range): Prototype.
        * sim-engine.h (sim_engine_jmp_values):
        Add sim_engine_interrupt_value and sim_engine_breakpoint_value.


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