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| From: | David Rogoff |
| Subject: | Re: cperl-mode - outline minor mode - subroutines |
| Date: | Wed, 21 Apr 2010 11:36:25 -0700 |
| User-agent: | Unison/2.0.5 |
Anyone know if any of these methods work well with Verilog code / verilog-mode? Thanks, David
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