[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: lisp file to modify contents of project
From: |
Andreas Röhler |
Subject: |
Re: lisp file to modify contents of project |
Date: |
Sat, 12 Nov 2011 13:46:23 +0100 |
User-agent: |
Mozilla/5.0 (X11; U; Linux i686; de; rv:1.9.2.23) Gecko/20110920 SUSE/3.1.15 Thunderbird/3.1.15 |
Am 11.11.2011 10:49, schrieb David Belohrad:
Dear All,
i'm not very experienced with elisp/emacs so any help here appreciated.
Imagine that I have VHDL project consisting of may VHDL files, like e.g.
this one:
----------------------------------------------------------------
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.Types.all;
use work.bunch_storage.all;
--! @brief bunch selection memory
--! @details implements 128x32 memory to store info about all the bunches
--! selected for the capture acquisition
entity bunch_selection_memory is
port (Clk120MHzxC : in std_logic; --! 120MHz clock
Reset120MHzxRN : in std_logic; --! 120MHz synced
reset
NumberOfBunchSlotsxD : in positive; --! number of bunch
slots derived from current timing and IsLHCTimingxS
BSELVmeMemDxD : in VLong; --! 16 bit word input to
the memory via VME interface
and so on..........
-------------------------------------------------------------------
this VHDL project is however defined as well in not-only-VHDL-files, but as
well e.g. mentor modelsim wave.do, containing commands like this one:
-------------------------------------------------------------------
add wave -noupdate -expand -group dut -format Logic -radix hexadecimal
/bunch_selection_memory_tb/dut/reset120mhzxrn
-------------------------------------------------------------------
or quartus setting file, containing settings like this one:
------------------------------------------------------------------
set_location_assignment PIN_D11 -to Reset120MHzxRN
------------------------------------------------------------------
Now I came into situation, that I have to rename the Reset120MHzxRN signal
into something completely different. So I was thinking just make dired of
VHDL/SETTING/MODELSIM files, and just replace Reset120MHzxRN by another
string. But I ran into troubles with caseness of the replace. I need that
in the VHDL and quartus setting file the case stays _exactly_ as is,
whereas in modelsim file I need to convert it into lowercase and replace
only lowercase occurence by another lowercase occurence.
I don't think it is possible to use dired mode for this - except that I do
all the operation in two steps. Having quite a lot of these signals it is
not really wise. So I was thinking, whether it is feasible to do some lisp
code, which will:
list all *.vhd, *.do, *.qsf from the project
do all the replacements as shown above.
is it feasible? the 'thing' i'm bit lost in is how to open make a list of
files universally (independent of whether win/lin), and how to generate
another buffer which would tell me what exactly in which file was changed
-> something like diff mode
any help appreciated....
thanks
d.
Just to send some start which should return a files list - approximately.
Before running edit the default directory, called in code "auspack" -
same with MY-TERM.
(defun my-replace-start (&optional directory)
(interactive)
(let* ((dir (or directory (expand-file-name "~/auspack")))
erg)
(setq erg (shell-command-to-string (concat "find " dir " -type f
-name \"\*.vhf\" -o -type f -name \"\*.do\" -o -type f -name \"\*.qsf\"
| xargs -0 -e grep -nH -e \"MY-TERM\"")))
(when (interactive-p) (message "%s" erg))
erg))
Once the files list ready, something like that
(dolist (ele liste)
(find-file ele)
(goto-char (point-min))
(while (re-search-forward "MY-EXPRESSION" nil (quote move) 1)
(replace-match "MY-REPLACE"))
(write-region...
HTH
Andreas