[Help-gnucap] (no subject)

[smkarim]

Hi Al,
I would like to get help for solving a problem we have.
In a project I am working on I get a file containing several RC netlists not
related to each other, as input. I read a netlist, perform transient analysis
on it, then we reduce the  netlist (You know, when more than one resistor is
connected serially we reduce them to one which has the sum of their resistance.
The same is done for capacitators connected in parallel), and then we do the
same transient analysis on it. Our goal is to calculate the difference between
the delays of the two analysis.
A sample input file for gnucap would be(We create this after reading a netlist
from the file):
TITLE TITLE TITLE
x1 4  1 2 3 5  eq
.subckt eq 4  1 2 3 5
r1 838 840 207.945
r2 859 850 0.108897
r3 848 1 45.44
r4 842 834 36.2695
r5 856 847 0.0963599
r6 843 835 36.2695
r7 854 855 0.0850969
r8 844 841 3.86875
r9 858 848 0.0146629
r10 3 834 232.125
r11 850 851 0.0311134
r12 845 837 45.44
r13 846 852 0.452868
r14 845 853 1.07222
r15 2 836 178.93
r16 856 854 0.0678535
r17 844 839 68.7778
r18 857 855 0.0678535
r19 3 840 232.125
r20 849 847 0.452868
r21 836 839 207.945
r22 851 852 0.230144
r23 850 4 45.44
r24 2 835 178.93
r25 856 853 0.0678535
r26 844 838 68.7778
r27 857 846 0.10439
r28 837 841 70.2484
r29 858 849 0.255811
c1 835 0 1.20421e-18
c2 837 0 1.14908e-17
c3 839 0 2.65709e-18
c4 843 0 1.20421e-18
c5 845 0 4.28801e-17
c6 847 0 1.43277e-18
c7 849 0 1.43277e-18
c8 851 0 1.99322e-17
c9 857 0 4.28801e-17
c10 834 0 4.26055e-18
c11 836 0 6.50522e-18
c12 838 0 2.83985e-18
c13 840 0 2.83985e-18
c14 844 0 1.14908e-17
c15 846 0 5.50047e-18
c16 850 0 2.97296e-17
c17 852 0 5.50047e-18
c18 858 0 4.96823e-17
c19 834 0 2.2166e-17
c20 835 0 2.35441e-18
c21 836 0 1.97728e-17
c22 837 0 1.53681e-17
c23 838 0 9.3748e-18
c24 839 0 8.79442e-18
c25 840 0 8.45981e-18
c26 842 0 5.42437e-18
c27 843 0 2.34558e-18
c28 844 0 2.73045e-17
c29 845 0 1.05767e-16
c30 846 0 2.41852e-18
c31 847 0 7.58601e-18
c32 849 0 4.91139e-18
c33 850 0 1.18092e-17
c34 851 0 1.27864e-17
c35 852 0 9.37032e-18
c36 857 0 2.92288e-17
c37 858 0 2.07257e-17
.ends
.gen Delay=0.5e-10 width=0.5e-10 period=1e-10 max=1 min=0 rise=0 fall=0
vin 4 0 generator(1)
.print tran v(4) v(1)
.tran 0 1e-10 1e-12 > clk_wave_res.txt

With delay we mean the time from the moment the wave at the input reaches 0.8
of
the max voltage (1 V) to the moment the the output node we check gets to the
same value.
Our problem is that both netlist and the reduced one give in most cases the
same
result so that the difference is always 0.
We thought about making the stepsize in the .tran line smaller than 1e-12 so
that we get more precise results but gnucap(0.32) says "very backward time
step".
I have three questions if You permit:
1. Is there a solution for this? can I do a more delicate analysis with smaller
stepsize?
2. The supervisor on the project(who doesn't understand anything about GNUCAP)
asked to enter voltage in one of the inputs and to enter 0 value in the other
inputs. How can we do this?
3. Are we checking the output right? We were asked to check only one output.

I would be so grateful if You answered these questions, and I thank You already
for reading till here :-)
We are already late in the submission of the project, and this is my last
project for getting the 4-year degree in CS.
Sincerely,
Karim Masarweh.