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recursive wildcard target in makefile


From: address@hidden
Subject: recursive wildcard target in makefile
Date: Mon, 16 Nov 2009 12:35:02 -0800 (PST)
User-agent: G2/1.0

Hi all!

I have .cpp sources in c/ directory of project and want to
generate .dep files for every .cpp in temp/ directory.

For example:
c/tester.cpp produced temp/tester.dep
c/lib1/file.cpp produced temp/lib1/file.dep
and so on.

makefile in c/ directory

I can collect names to generate:

CPP_SOURCES = $(wildcard *.cpp */*.cpp */*/*.cpp */*/*/*.cpp)
DEPS = $(patsubst %,../temp/%,$(patsubst %.cpp,%.dep, $
(CPP_SOURCES)))

But I can't write rule for this case. Here is first variant I write:

%.dep: ../c/%.cpp
        g++ -MM -MF $@ $(INCLUDES) $<
        g++ -MM -MT $@ $(INCLUDES) $< >> $@

But this case valid only for c/*.cpp and not valid for any
subdirectory like c/lib1/*.cpp. I want to make something like this:

%.dep: $(patsubst ../temp/%,./%, $%*.cpp)

How to write it right? temp/lib1/file.dep must depends on c/lib1/
file.cpp and so on.


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