Re: Parallel make repeating jobs

[Paul D. Smith]

%% Damian Menscher <address@hidden> writes:

  dm> address@hidden:~/Computer/Makefile-test> cat Makefile

  dm> all: A B C
  dm>         echo done

  dm> A B C:
  dm>         touch A
  dm>         touch B
  dm>         touch C

  dm> Personally, I'd call it a bug to have different output depending
  dm> on how many processors it's running on.

I'd say you're right, but the bug is in your makefile, not make :).

You misunderstand what it means to have multiple targets in a single
rule.  The above syntax is identical to this:

  A:
        touch A
        touch B
        touch C
  B:
        touch A
        touch B
        touch C
  C:
        touch A
        touch B
        touch C

It does _NOT_ mean that all the targets are built from one invocation of
the command script.  Given that, make's behavior is perfectly correct.

See the GNU make manual (or any make documentation: this is how every
version of make has always worked, for 20+ years...)

  dm> Since A B C are all generated from the same program, it's silly
  dm> (and possibly harmful) to have that program be run multiple times.
  dm> For now, I'm forced to run single-threaded.  Can anyone give
  dm> advice on how I can get around this problem?

If your rule can be written as a pattern rule, then you can use multiple
patterns in one rule and get the behavior you want (again, see the GNU
make manual).  If you have to use explicit rules, then all you can do is
something like this:

  A B C: .built-ABC

  .built-ABC:
        touch A
        touch B
        touch C

-- 
-------------------------------------------------------------------------------
 Paul D. Smith <address@hidden>          Find some GNU make tips at:
 http://www.gnu.org                      http://make.paulandlesley.org
 "Please remain calm...I may be mad, but I am a professional." --Mad Scientist