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Re: how to use wildcard in prerequisite


From: Paul D. Smith
Subject: Re: how to use wildcard in prerequisite
Date: Tue, 2 Sep 2003 23:52:53 -0400

%% address@hidden writes:

  hpvl> I want to define a dependency for several files in the cmd directory
  hpvl> like this: 

  hpvl> %project/out : %cmd/*.tcl 
  hpvl> This failed, the * did not expand as far as I could see. 

Correct.  GNU make never expands wildcards like * (except through using
the $(wildcard ...) function).

  hpvl> Now I tried: 
  hpvl> %project/out : %$(wildcard cmd/*.tcl) 

No, this won't work.  Variables and functions are expanded immediately
when in an immediate context, and both target and prerequisites are
immediate contexts (see the GNU make manual for a description of all
immediate and deferred contexts).

Patterns are not expanded until much later, after all the makefiles have
been read in and make is trying to match the pattern.  So, the above
expands to this (assuming you have a.tcl, b.tcl, and c.tcl in your cmd
directory) in make's internal rules database:

  %project/out : %cmd/a.tcl cmd/b.tcl cmd/c.tcl

which is exactly what you say you saw.

  hpvl> Now I tried a work around like: 
  hpvl> CMD = $(shell ls cmd/*.tcl | sed 's/cmd/%cmd/') 
  hpvl> %project/out: $CMD 

  hpvl> Now it works as I would expect. 

Why not use something like:

    %project/out : $(addprefix %,$(wildcard cmd/*.tcl))

and avoid using the shell and sed altogether?

  hpvl> Could this be a bug?

All of the above behavior is correct and exactly as documented in the
GNU make manual.

Good luck!

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 Paul D. Smith <address@hidden>          Find some GNU make tips at:
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