for loop question

[Rousselle, Christine]

Hi, 

Is there a way to write a for or foreach loop with a rule in the makefile?
I want to be able to do something like: 

foreach cam, $(CAMLIST) prerequisites; 
  EXEC.sythesize 
  EXEC.compile 
  EXEC.parse_results 
end 

I don't really see anything like that in the GNU Makefile docs.  Do I need
to generate my makefile with a perl or autoconfig script first that
basically expands the for loop?  

Thanks, 
Christine